gogogaga

RTL/AysncFifo.v

@@ -0,0 +1,69 @@
+module AysncFifo (
+	write_io_clk,
+	write_io_enq_valid,
+	write_io_enq_bits,
+	read_io_clk,
+	read_io_deq_ready,
+	read_io_deq_valid,
+	read_io_deq_bits
+);
+	input write_io_clk;
+	input write_io_enq_valid;
+	input [7:0] write_io_enq_bits;
+	input read_io_clk;
+	input read_io_deq_ready;
+	output wire read_io_deq_valid;
+	output wire [7:0] read_io_deq_bits;
+	wire write_ready;
+	reg [10:0] write_ptr;
+	wire _GEN = write_ready & write_io_enq_valid;
+	reg [10:0] read_ptr;
+	reg [10:0] crossed_write_ptr_reg1;
+	reg [10:0] crossed_write_ptr_reg2;
+	wire _crossed_write_ptr_T_4 = crossed_write_ptr_reg2[10] ^ crossed_write_ptr_reg2[9];
+	wire _crossed_write_ptr_T_6 = _crossed_write_ptr_T_4 ^ crossed_write_ptr_reg2[8];
+	wire _crossed_write_ptr_T_8 = _crossed_write_ptr_T_6 ^ crossed_write_ptr_reg2[7];
+	wire _crossed_write_ptr_T_10 = _crossed_write_ptr_T_8 ^ crossed_write_ptr_reg2[6];
+	wire _crossed_write_ptr_T_12 = _crossed_write_ptr_T_10 ^ crossed_write_ptr_reg2[5];
+	wire _crossed_write_ptr_T_14 = _crossed_write_ptr_T_12 ^ crossed_write_ptr_reg2[4];
+	wire _crossed_write_ptr_T_16 = _crossed_write_ptr_T_14 ^ crossed_write_ptr_reg2[3];
+	wire _crossed_write_ptr_T_18 = _crossed_write_ptr_T_16 ^ crossed_write_ptr_reg2[2];
+	wire _crossed_write_ptr_T_20 = _crossed_write_ptr_T_18 ^ crossed_write_ptr_reg2[1];
+	reg [10:0] crossed_read_ptr_reg1;
+	reg [10:0] crossed_read_ptr_reg2;
+	wire _crossed_read_ptr_T_4 = crossed_read_ptr_reg2[10] ^ crossed_read_ptr_reg2[9];
+	wire _crossed_read_ptr_T_6 = _crossed_read_ptr_T_4 ^ crossed_read_ptr_reg2[8];
+	wire _crossed_read_ptr_T_8 = _crossed_read_ptr_T_6 ^ crossed_read_ptr_reg2[7];
+	wire _crossed_read_ptr_T_10 = _crossed_read_ptr_T_8 ^ crossed_read_ptr_reg2[6];
+	wire _crossed_read_ptr_T_12 = _crossed_read_ptr_T_10 ^ crossed_read_ptr_reg2[5];
+	wire _crossed_read_ptr_T_14 = _crossed_read_ptr_T_12 ^ crossed_read_ptr_reg2[4];
+	wire _crossed_read_ptr_T_16 = _crossed_read_ptr_T_14 ^ crossed_read_ptr_reg2[3];
+	wire _crossed_read_ptr_T_18 = _crossed_read_ptr_T_16 ^ crossed_read_ptr_reg2[2];
+	wire _crossed_read_ptr_T_20 = _crossed_read_ptr_T_18 ^ crossed_read_ptr_reg2[1];
+	wire _crossed_read_ptr_T_22 = _crossed_read_ptr_T_20 ^ crossed_read_ptr_reg2[0];
+	assign write_ready = ({crossed_read_ptr_reg2[10], _crossed_read_ptr_T_4, _crossed_read_ptr_T_6, _crossed_read_ptr_T_8, _crossed_read_ptr_T_10, _crossed_read_ptr_T_12, _crossed_read_ptr_T_14, _crossed_read_ptr_T_16, _crossed_read_ptr_T_18, _crossed_read_ptr_T_20, _crossed_read_ptr_T_22} == write_ptr) | ({_crossed_read_ptr_T_4, _crossed_read_ptr_T_6, _crossed_read_ptr_T_8, _crossed_read_ptr_T_10, _crossed_read_ptr_T_12, _crossed_read_ptr_T_14, _crossed_read_ptr_T_16, _crossed_read_ptr_T_18, _crossed_read_ptr_T_20, _crossed_read_ptr_T_22} != write_ptr[9:0]);
+	wire read_valid = {crossed_write_ptr_reg2[10], _crossed_write_ptr_T_4, _crossed_write_ptr_T_6, _crossed_write_ptr_T_8, _crossed_write_ptr_T_10, _crossed_write_ptr_T_12, _crossed_write_ptr_T_14, _crossed_write_ptr_T_16, _crossed_write_ptr_T_18, _crossed_write_ptr_T_20, _crossed_write_ptr_T_20 ^ crossed_write_ptr_reg2[0]} != read_ptr;
+	always @(posedge write_io_clk) begin
+		if (_GEN)
+			write_ptr <= write_ptr + 11'h001;
+		crossed_read_ptr_reg1 <= {read_ptr[10], read_ptr[9:0] ^ read_ptr[10:1]};
+		crossed_read_ptr_reg2 <= crossed_read_ptr_reg1;
+	end
+	always @(posedge read_io_clk) begin
+		if (read_io_deq_ready & read_valid)
+			read_ptr <= read_ptr + 11'h001;
+		crossed_write_ptr_reg1 <= {write_ptr[10], write_ptr[9:0] ^ write_ptr[10:1]};
+		crossed_write_ptr_reg2 <= crossed_write_ptr_reg1;
+	end
+	mem_1024x8 mem_ext(
+		.R0_addr(read_ptr[9:0]),
+		.R0_en(1'h1),
+		.R0_clk(read_io_clk),
+		.R0_data(read_io_deq_bits),
+		.W0_addr(write_ptr[9:0]),
+		.W0_en(_GEN),
+		.W0_clk(write_io_clk),
+		.W0_data(write_io_enq_bits)
+	);
+	assign read_io_deq_valid = read_valid;
+endmodule