create_clock -name clk -period 20.000 [get_ports { clk }]
create_clock -name RGMII_RXCK -period 8.000 -waveform {0 4.000} [get_ports { RGMII_RXCK }]


## Data valid around the rising edge of RXC
set_input_delay -clock RGMII_RXCK -max 1.0 [get_ports {RGMII_RXD_* rgmii_rx_ctl}]
set_input_delay -clock RGMII_RXCK -min -1.0  [get_ports {RGMII_RXD_* rgmii_rx_ctl}]

set_input_delay -clock RGMII_RXCK -max 1.0 [get_ports {RGMII_RXDV rgmii_rx_ctl}]
set_input_delay -clock RGMII_RXCK -min -1.0  [get_ports {RGMII_RXDV rgmii_rx_ctl}]

## Data valid around the falling edge of RXC (RGMII is DDR)
set_input_delay -clock RGMII_RXCK -max 1.0 [get_ports {RGMII_RXD_* rgmii_rx_ctl}] -clock_fall -add_delay
set_input_delay -clock RGMII_RXCK -min -1.0  [get_ports {RGMII_RXD_* rgmii_rx_ctl}] -clock_fall -add_delay

set_input_delay -clock RGMII_RXCK -max 1.0 [get_ports {RGMII_RXDV rgmii_rx_ctl}] -clock_fall -add_delay
set_input_delay -clock RGMII_RXCK -min -1.0  [get_ports {RGMII_RXDV rgmii_rx_ctl}] -clock_fall -add_delay