`ifdef COCOTB_SIM
    `define COCOTB_CODE(name) \
        string __top_module; \
        string __vcd_file; \
        initial begin \
            if ($value$plusargs("TOP_MODULE=%s", __top_module) && __top_module == `"name`" && $value$plusargs("VCD_FILENAME=%s", __vcd_file)) begin \
                $dumpfile (__vcd_file); \
                $dumpvars (0, \name ); \
            end \
        end
`else
    `define COCOTB_CODE(name)
`endif


module \std::cdc::sync2[1531]  (
        input clk_i,
        input input_i,
        output output__
    );
    `COCOTB_CODE( std::cdc::sync2[1531] )
    logic \clk ;
    assign \clk  = clk_i;
    logic \input ;
    assign \input  = input_i;
    (* src = "<compiler dir>/stdlib/cdc.spade:14,14" *)
    reg \sync1 ;
    (* src = "<compiler dir>/stdlib/cdc.spade:15,14" *)
    reg \sync2 ;
    always @(posedge \clk ) begin
        \sync1  <= \input ;
    end
    always @(posedge \clk ) begin
        \sync2  <= \sync1 ;
    end
    assign output__ = \sync2 ;
endmodule


module \std::cdc::sync2_bool  (
        input clk_i,
        input input_i,
        output output__
    );
    `COCOTB_CODE( std::cdc::sync2_bool )
    logic \clk ;
    assign \clk  = clk_i;
    logic \input ;
    assign \input  = input_i;
    (* src = "<compiler dir>/stdlib/cdc.spade:31,14" *)
    logic _e_544;
    (* src = "<compiler dir>/stdlib/cdc.spade:31,14" *)
    
    \std::cdc::sync2[1531]  \sync2_0 (.clk_i(\clk ), .input_i(\input ), .output__(_e_544));
    assign output__ = _e_544;
endmodule


module \std::conv::tri_to_bool  (
        input t_i,
        output output__
    );
    `COCOTB_CODE( std::conv::tri_to_bool )
    logic \t ;
    assign \t  = t_i;
    (* src = "<compiler dir>/stdlib/conv.spade:80,5" *)
    logic _e_828;
    (* src = "<compiler dir>/stdlib/conv.spade:80,5" *)
    
    \std::conv::impl#12::as_bool  \as_bool_0 (.self_i(\t ), .output__(_e_828));
    assign output__ = _e_828;
endmodule


module \std::io::rising_edge  (
        input clk_i,
        input value_i,
        output output__
    );
    `COCOTB_CODE( std::io::rising_edge )
    logic \clk ;
    assign \clk  = clk_i;
    logic \value ;
    assign \value  = value_i;
    (* src = "<compiler dir>/stdlib/io.spade:12,14" *)
    reg \old_value ;
    (* src = "<compiler dir>/core/ops.spade:255,29" *)
    logic _e_2202;
    (* src = "<compiler dir>/core/ops.spade:255,9" *)
    logic _e_2201;
    (* src = "<compiler dir>/core/ops.spade:255,9" *)
    logic _e_1034;
    (* src = "<compiler dir>/core/ops.spade:297,29" *)
    logic _e_2210;
    (* src = "<compiler dir>/core/ops.spade:297,37" *)
    logic _e_2211;
    (* src = "<compiler dir>/core/ops.spade:297,9" *)
    logic _e_2209;
    (* src = "<compiler dir>/core/ops.spade:297,9" *)
    logic _e_1032;
    always @(posedge \clk ) begin
        \old_value  <= \value ;
    end
    assign _e_2202 = {\old_value };
    assign _e_2201 = ~_e_2202;
    assign _e_1034 = _e_2201;
    assign _e_2210 = {\value };
    assign _e_2211 = {_e_1034};
    assign _e_2209 = _e_2210 & _e_2211;
    assign _e_1032 = _e_2209;
    assign output__ = _e_1032;
endmodule


module \std::io::falling_edge  (
        input clk_i,
        input value_i,
        output output__
    );
    `COCOTB_CODE( std::io::falling_edge )
    logic \clk ;
    assign \clk  = clk_i;
    logic \value ;
    assign \value  = value_i;
    (* src = "<compiler dir>/stdlib/io.spade:27,14" *)
    reg \old_value ;
    (* src = "<compiler dir>/core/ops.spade:255,29" *)
    logic _e_2220;
    (* src = "<compiler dir>/core/ops.spade:255,9" *)
    logic _e_2219;
    (* src = "<compiler dir>/core/ops.spade:255,9" *)
    logic _e_2218;
    (* src = "<compiler dir>/core/ops.spade:297,29" *)
    logic _e_2228;
    (* src = "<compiler dir>/core/ops.spade:297,37" *)
    logic _e_2229;
    (* src = "<compiler dir>/core/ops.spade:297,9" *)
    logic _e_2227;
    (* src = "<compiler dir>/core/ops.spade:297,9" *)
    logic _e_2226;
    always @(posedge \clk ) begin
        \old_value  <= \value ;
    end
    assign _e_2220 = {\value };
    assign _e_2219 = ~_e_2220;
    assign _e_2218 = _e_2219;
    assign _e_2228 = {_e_2218};
    assign _e_2229 = {\old_value };
    assign _e_2227 = _e_2228 & _e_2229;
    assign _e_2226 = _e_2227;
    assign output__ = _e_2226;
endmodule


module main (
        input clk,
        output[3:0] leds,
        output tmds_clk,
        output[2:0] tmds
    );
    `COCOTB_CODE( main )
    logic[3:0] \leds_mut ;
    assign leds = \leds_mut ;
    logic \tmds_clk_mut ;
    assign tmds_clk = \tmds_clk_mut ;
    logic[2:0] \tmds_mut ;
    assign tmds = \tmds_mut ;
    (* src = "src/main.spade:9,35" *)
    logic _e_2156;
    (* src = "src/main.spade:9,35" *)
    logic _e_2157_mut;
    (* src = "src/main.spade:9,35" *)
    logic _e_1733;
    (* src = "src/main.spade:9,35" *)
    logic _e_1733_mut;
    (* src = "src/main.spade:9,9" *)
    logic \clk_pll ;
    (* src = "src/main.spade:9,9" *)
    logic \clk_pll_wire_mut ;
    (* src = "src/main.spade:10,37" *)
    logic _e_2158;
    (* src = "src/main.spade:10,37" *)
    logic _e_2159_mut;
    (* src = "src/main.spade:10,37" *)
    logic _e_1737;
    (* src = "src/main.spade:10,37" *)
    logic _e_1737_mut;
    (* src = "src/main.spade:10,9" *)
    logic \lock_pll ;
    (* src = "src/main.spade:10,9" *)
    logic \lock_pll_wire_mut ;
    localparam[31:0] _e_1748 = 32'd50000000;
    (* src = "<compiler dir>/core/ops.spade:53,9" *)
    logic _e_1746;
    localparam[31:0] _e_1750 = 32'd0;
    localparam[31:0] _e_1754 = 32'd1;
    (* src = "src/main.spade:13,75" *)
    logic[31:0] _e_1752;
    (* src = "src/main.spade:13,38" *)
    logic[31:0] _e_1745;
    (* src = "src/main.spade:13,18" *)
    reg[31:0] \counter ;
    localparam[31:0] _e_1760 = 32'd0;
    (* src = "<compiler dir>/core/ops.spade:53,9" *)
    logic _e_1758;
    (* src = "<compiler dir>/core/ops.spade:255,29" *)
    logic _e_2242;
    (* src = "<compiler dir>/core/ops.spade:255,9" *)
    logic _e_2241;
    (* src = "<compiler dir>/core/ops.spade:255,9" *)
    logic _e_1762;
    (* src = "src/main.spade:14,29" *)
    logic _e_1757;
    (* src = "src/main.spade:14,18" *)
    reg \on ;
    localparam[0:0] _e_1770 = 0;
    localparam[0:0] _e_1771 = 0;
    localparam[0:0] _e_1772 = 0;
    (* src = "src/main.spade:19,16" *)
    logic[2:0] _e_1769;
    (* src = "<compiler dir>/core/ops.spade:255,29" *)
    logic _e_2250;
    (* src = "<compiler dir>/core/ops.spade:255,9" *)
    logic _e_2249;
    (* src = "<compiler dir>/core/ops.spade:255,9" *)
    logic _e_2248;
    (* src = "<compiler dir>/core/ops.spade:255,29" *)
    logic _e_2258;
    (* src = "<compiler dir>/core/ops.spade:255,9" *)
    logic _e_2257;
    (* src = "<compiler dir>/core/ops.spade:255,9" *)
    logic _e_1777;
    (* src = "<compiler dir>/core/ops.spade:255,29" *)
    logic _e_2266;
    (* src = "<compiler dir>/core/ops.spade:255,9" *)
    logic _e_2265;
    (* src = "<compiler dir>/core/ops.spade:255,9" *)
    logic _e_2264;
    (* src = "<compiler dir>/core/ops.spade:255,29" *)
    logic _e_2274;
    (* src = "<compiler dir>/core/ops.spade:255,9" *)
    logic _e_2273;
    (* src = "<compiler dir>/core/ops.spade:255,9" *)
    logic _e_1781;
    (* src = "src/main.spade:21,16" *)
    logic[3:0] _e_1774;
    
    assign _e_2156 = _e_2157_mut;
    assign _e_1733 = {_e_2156};
    assign {_e_2157_mut} = _e_1733_mut;
    assign \clk_pll  = _e_1733;
    assign _e_1733_mut = \clk_pll_wire_mut ;
    
    assign _e_2158 = _e_2159_mut;
    assign _e_1737 = {_e_2158};
    assign {_e_2159_mut} = _e_1737_mut;
    assign \lock_pll  = _e_1737;
    assign _e_1737_mut = \lock_pll_wire_mut ;
    (* src = "src/main.spade:11,5" *)
    
    pll \pll_0 (.clkin(\clk ), .init_clk(\clk ), .clkout0(\clk_pll_wire_mut ), .lock(\lock_pll_wire_mut ));
    assign _e_1746 = \counter  == _e_1748;
    (* src = "src/main.spade:13,75" *)
    
    \core::ops::impl#77::wrapping_add[1533]  \wrapping_add_0 (.self_i(\counter ), .rhs_i(_e_1754), .output__(_e_1752));
    assign _e_1745 = _e_1746 ? _e_1750 : _e_1752;
    always @(posedge \clk_pll ) begin
        \counter  <= _e_1745;
    end
    assign _e_1758 = \counter  == _e_1760;
    assign _e_2242 = {\on };
    assign _e_2241 = ~_e_2242;
    assign _e_1762 = _e_2241;
    assign _e_1757 = _e_1758 ? _e_1762 : \on ;
    always @(posedge \clk_pll ) begin
        \on  <= _e_1757;
    end
    assign \tmds_clk_mut  = \clk_pll ;
    assign _e_1769 = {_e_1772, _e_1771, _e_1770};
    assign \tmds_mut  = _e_1769;
    assign _e_2250 = {\on };
    assign _e_2249 = ~_e_2250;
    assign _e_2248 = _e_2249;
    assign _e_2258 = {\on };
    assign _e_2257 = ~_e_2258;
    assign _e_1777 = _e_2257;
    assign _e_2266 = {\on };
    assign _e_2265 = ~_e_2266;
    assign _e_2264 = _e_2265;
    assign _e_2274 = {\lock_pll };
    assign _e_2273 = ~_e_2274;
    assign _e_1781 = _e_2273;
    assign _e_1774 = {_e_1781, _e_2264, _e_1777, _e_2248};
    assign \leds_mut  = _e_1774;
    
endmodule


module \std::conv::impl#10::as_clock  (
        input self_i,
        output output__
    );
    `COCOTB_CODE( std::conv::impl#10::as_clock )
    logic \self ;
    assign \self  = self_i;
    logic _e_872;
    assign _e_872 = \self ;
    assign output__ = _e_872;
endmodule


module \std::conv::impl#10::as_uint  (
        input self_i,
        output output__
    );
    `COCOTB_CODE( std::conv::impl#10::as_uint )
    logic \self ;
    assign \self  = self_i;
    logic _e_876;
    assign _e_876 = \self ;
    assign output__ = _e_876;
endmodule


module \std::conv::impl#11::as_bool  (
        input self_i,
        output output__
    );
    `COCOTB_CODE( std::conv::impl#11::as_bool )
    logic \self ;
    assign \self  = self_i;
    logic _e_887;
    assign _e_887 = \self ;
    assign output__ = _e_887;
endmodule


module \std::conv::impl#12::as_bool  (
        input self_i,
        output output__
    );
    `COCOTB_CODE( std::conv::impl#12::as_bool )
    logic \self ;
    assign \self  = self_i;
    logic _e_895;
    assign _e_895 = \self ;
    assign output__ = _e_895;
endmodule


module \std::default::impl#17::hacky_default  (
        input self_i,
        output output__
    );
    `COCOTB_CODE( std::default::impl#17::hacky_default )
    logic \self ;
    assign \self  = self_i;
    localparam[0:0] _e_971 = 0;
    assign output__ = _e_971;
endmodule


module \std::default::impl#18::hacky_default  (
        
    );
    `COCOTB_CODE( std::default::impl#18::hacky_default )
    
endmodule


module \core::ops::impl#77::wrapping_add[1533]  (
        input[31:0] self_i,
        input[31:0] rhs_i,
        output[31:0] output__
    );
    `COCOTB_CODE( core::ops::impl#77::wrapping_add[1533] )
    logic[31:0] \self ;
    assign \self  = self_i;
    logic[31:0] \rhs ;
    assign \rhs  = rhs_i;
    (* src = "<compiler dir>/core/ops.spade:166,62" *)
    logic[32:0] _e_1923;
    logic[32:0] \bits ;
    (* src = "<compiler dir>/core/ops.spade:167,34" *)
    logic[31:0] _e_1928;
    logic[31:0] _e_1927;
    assign _e_1923 = \self  + \rhs ;
    assign \bits  = _e_1923;
    assign _e_1928 = \bits [31-:32];
    assign _e_1927 = _e_1928;
    assign output__ = _e_1927;
endmodule

`default_nettype none