Power Messages
| Report Title | Power Analysis Report |
| Design File | /work/impl/gwsynthesis/build.vg |
| Physical Constraints File | /work/pins.cst |
| Timing Constraints File | /work/test.sdc |
| Tool Version | V1.9.11.03 Education |
| Part Number | GW5AST-LV138PG484AC1/I0 |
| Device | GW5AST-138 |
| Device Version | C |
| Created Time | Thu Jun 18 20:00:32 2026 |
| Legal Announcement | Copyright (C)2014-2025 Gowin Semiconductor Corporation. All rights reserved. |
Configure Information:
| Grade | Commercial |
| Process | Typical |
| Ambient Temperature | 25.000 |
| Use Custom Theta JA | false |
| Heat Sink | None |
| Air Flow | LFM_0 |
| Use Custom Theta SA | false |
| Board Thermal Model | None |
| Use Custom Theta JB | false |
| Related Vcd File | |
| Related Saif File | |
| Filter Glitches | false |
| Default IO Toggle Rate | 0.125 |
| Default Remain Toggle Rate | 0.125 |
Power Summary
Power Information:
| Total Power (mW) | 104.823 |
| Quiescent Power (mW) | 100.835 |
| Dynamic Power (mW) | 3.988 |
Thermal Information:
| Junction Temperature | 26.798 |
| Theta JA | 17.153 |
| Max Allowed Ambient Temperature | 83.202 |
Supply Information:
| Voltage Source | Voltage | Dynamic Current(mA) | Quiescent Current(mA) | Power(mW) |
|---|---|---|---|---|
| VCC | 0.900 | 4.148 | 80.012 | 75.744 |
| VCCX | 1.800 | 0.049 | 7.200 | 13.049 |
| VCCIO33 | 3.300 | 0.050 | 3.062 | 10.270 |
| VCCLDO | 1.200 | 0.000 | 4.800 | 5.760 |
Power Details
Power By Block Type:
| Block Type | Total Power(mW) | Static Power(mW) | Average Toggle Rate(millions of transitions/sec) |
|---|---|---|---|
| Logic | 0.024 | NA | 1.885 |
| IO | 11.490 | 11.191 | 3.038 |
| PLL | 3.664 | NA | NA |
Power By Hierarchy:
| Hierarchy Entity | Total Power(mW) | Block Dynamic Power(mW) |
|---|---|---|
| main | 3.688 | 3.688(3.686) |
| main/pll_0/ | 3.678 | 3.678(3.678) |
| main/pll_0/u_pll/ | 3.664 | 3.664(0.000) |
| main/pll_0/u_pll_init/ | 0.014 | 0.014(0.000) |
| main/wrapping_add_0/ | 0.008 | 0.008(0.000) |
Power By Clock Domain:
| Clock Domain | Clock Frequency(Mhz) | Total Dynamic Power(mW) |
|---|---|---|
| clk | 20.000 | 3.679 |
| pll_0/u_pll/PLL_inst/CLKOUT0.default_gen_clk | 9.677 | 0.010 |