`ifdef COCOTB_SIM `define COCOTB_CODE(name) \ string __top_module; \ string __vcd_file; \ initial begin \ if ($value$plusargs("TOP_MODULE=%s", __top_module) && __top_module == `"name`" && $value$plusargs("VCD_FILENAME=%s", __vcd_file)) begin \ $dumpfile (__vcd_file); \ $dumpvars (0, \name ); \ end \ end `else `define COCOTB_CODE(name) `endif module \std::cdc::sync2[1523] ( input clk_i, input input_i, output output__ ); `COCOTB_CODE( std::cdc::sync2[1523] ) logic \clk ; assign \clk = clk_i; logic \input ; assign \input = input_i; (* src = "/stdlib/cdc.spade:14,14" *) reg \sync1 ; (* src = "/stdlib/cdc.spade:15,14" *) reg \sync2 ; always @(posedge \clk ) begin \sync1 <= \input ; end always @(posedge \clk ) begin \sync2 <= \sync1 ; end assign output__ = \sync2 ; endmodule module \std::cdc::sync2_bool ( input clk_i, input input_i, output output__ ); `COCOTB_CODE( std::cdc::sync2_bool ) logic \clk ; assign \clk = clk_i; logic \input ; assign \input = input_i; (* src = "/stdlib/cdc.spade:31,14" *) logic _e_544; (* src = "/stdlib/cdc.spade:31,14" *) \std::cdc::sync2[1523] \sync2_0 (.clk_i(\clk ), .input_i(\input ), .output__(_e_544)); assign output__ = _e_544; endmodule module \std::conv::tri_to_bool ( input t_i, output output__ ); `COCOTB_CODE( std::conv::tri_to_bool ) logic \t ; assign \t = t_i; (* src = "/stdlib/conv.spade:80,5" *) logic _e_828; (* src = "/stdlib/conv.spade:80,5" *) \std::conv::impl#12::as_bool \as_bool_0 (.self_i(\t ), .output__(_e_828)); assign output__ = _e_828; endmodule module \std::io::rising_edge ( input clk_i, input value_i, output output__ ); `COCOTB_CODE( std::io::rising_edge ) logic \clk ; assign \clk = clk_i; logic \value ; assign \value = value_i; (* src = "/stdlib/io.spade:12,14" *) reg \old_value ; (* src = "/core/ops.spade:255,29" *) logic _e_2136; (* src = "/core/ops.spade:255,9" *) logic _e_2135; (* src = "/core/ops.spade:255,9" *) logic _e_1034; (* src = "/core/ops.spade:297,29" *) logic _e_2144; (* src = "/core/ops.spade:297,37" *) logic _e_2145; (* src = "/core/ops.spade:297,9" *) logic _e_2143; (* src = "/core/ops.spade:297,9" *) logic _e_1032; always @(posedge \clk ) begin \old_value <= \value ; end assign _e_2136 = {\old_value }; assign _e_2135 = ~_e_2136; assign _e_1034 = _e_2135; assign _e_2144 = {\value }; assign _e_2145 = {_e_1034}; assign _e_2143 = _e_2144 & _e_2145; assign _e_1032 = _e_2143; assign output__ = _e_1032; endmodule module \std::io::falling_edge ( input clk_i, input value_i, output output__ ); `COCOTB_CODE( std::io::falling_edge ) logic \clk ; assign \clk = clk_i; logic \value ; assign \value = value_i; (* src = "/stdlib/io.spade:27,14" *) reg \old_value ; (* src = "/core/ops.spade:255,29" *) logic _e_2154; (* src = "/core/ops.spade:255,9" *) logic _e_2153; (* src = "/core/ops.spade:255,9" *) logic _e_1041; (* src = "/core/ops.spade:297,29" *) logic _e_2162; (* src = "/core/ops.spade:297,37" *) logic _e_2163; (* src = "/core/ops.spade:297,9" *) logic _e_2161; (* src = "/core/ops.spade:297,9" *) logic _e_2160; always @(posedge \clk ) begin \old_value <= \value ; end assign _e_2154 = {\value }; assign _e_2153 = ~_e_2154; assign _e_1041 = _e_2153; assign _e_2162 = {_e_1041}; assign _e_2163 = {\old_value }; assign _e_2161 = _e_2162 & _e_2163; assign _e_2160 = _e_2161; assign output__ = _e_2160; endmodule module main ( input clk, output[3:0] leds ); `COCOTB_CODE( main ) logic[3:0] \leds_mut ; assign leds = \leds_mut ; localparam[23:0] _e_1734 = 1; (* src = "src/main.spade:4,34" *) logic[23:0] _e_1732; (* src = "src/main.spade:4,14" *) reg[23:0] \counter ; localparam[23:0] _e_1740 = 20; (* src = "src/main.spade:6,16" *) logic[23:0] _e_1738; (* src = "src/main.spade:6,16" *) logic[23:0] _e_1737; (* src = "src/main.spade:6,16" *) logic[3:0] _e_1736; (* src = "src/main.spade:4,34" *) \core::ops::impl#77::wrapping_add[1524] \wrapping_add_0 (.self_i(\counter ), .rhs_i(_e_1734), .output__(_e_1732)); always @(posedge \clk ) begin \counter <= _e_1732; end assign _e_1738 = \counter >> _e_1740; (* src = "src/main.spade:6,16" *) \std::conv::impl#14::as_bits[1525] \as_bits_0 (.self_i(_e_1738), .output__(_e_1737)); assign _e_1736 = _e_1737[3-:4]; assign \leds_mut = _e_1736; endmodule module \std::conv::impl#10::as_clock ( input self_i, output output__ ); `COCOTB_CODE( std::conv::impl#10::as_clock ) logic \self ; assign \self = self_i; logic _e_872; assign _e_872 = \self ; assign output__ = _e_872; endmodule module \std::conv::impl#10::as_uint ( input self_i, output output__ ); `COCOTB_CODE( std::conv::impl#10::as_uint ) logic \self ; assign \self = self_i; logic _e_876; assign _e_876 = \self ; assign output__ = _e_876; endmodule module \std::conv::impl#11::as_bool ( input self_i, output output__ ); `COCOTB_CODE( std::conv::impl#11::as_bool ) logic \self ; assign \self = self_i; logic _e_887; assign _e_887 = \self ; assign output__ = _e_887; endmodule module \std::conv::impl#12::as_bool ( input self_i, output output__ ); `COCOTB_CODE( std::conv::impl#12::as_bool ) logic \self ; assign \self = self_i; logic _e_895; assign _e_895 = \self ; assign output__ = _e_895; endmodule module \std::conv::impl#14::as_bits[1525] ( input[23:0] self_i, output[23:0] output__ ); `COCOTB_CODE( std::conv::impl#14::as_bits[1525] ) logic[23:0] \self ; assign \self = self_i; logic[23:0] _e_917; assign _e_917 = \self ; assign output__ = _e_917; endmodule module \std::default::impl#17::hacky_default ( input self_i, output output__ ); `COCOTB_CODE( std::default::impl#17::hacky_default ) logic \self ; assign \self = self_i; localparam[0:0] _e_971 = 0; assign output__ = _e_971; endmodule module \std::default::impl#18::hacky_default ( ); `COCOTB_CODE( std::default::impl#18::hacky_default ) endmodule module \core::ops::impl#77::wrapping_add[1524] ( input[23:0] self_i, input[23:0] rhs_i, output[23:0] output__ ); `COCOTB_CODE( core::ops::impl#77::wrapping_add[1524] ) logic[23:0] \self ; assign \self = self_i; logic[23:0] \rhs ; assign \rhs = rhs_i; (* src = "/core/ops.spade:166,62" *) logic[24:0] _e_1883; logic[24:0] \bits ; (* src = "/core/ops.spade:167,34" *) logic[23:0] _e_1888; logic[23:0] _e_1887; assign _e_1883 = \self + \rhs ; assign \bits = _e_1883; assign _e_1888 = \bits [23-:24]; assign _e_1887 = _e_1888; assign output__ = _e_1887; endmodule `default_nettype none