This commit is contained in:
2026-06-18 23:10:59 +02:00
parent 0d4fd7957f
commit 50dbc682d9
29 changed files with 2007161 additions and 93 deletions
BIN
View File
Binary file not shown.
BIN
View File
Binary file not shown.
BIN
View File
Binary file not shown.
+21915
View File
File diff suppressed because it is too large Load Diff
+31
View File
@@ -0,0 +1,31 @@
Reading netlist file: "/work/impl/gwsynthesis/build.vg"
Parsing netlist file "/work/impl/gwsynthesis/build.vg" completed
Processing netlist completed
Reading constraint file: "/work/pins.cst"
Physical Constraint parsed completed
Running placement......
[10%] Placement Phase 0 completed
[20%] Placement Phase 1 completed
[30%] Placement Phase 2 completed
WARN (TA1118) : the clock "clk"'s frequency does not match pll_0/u_pll/PLL_inst's param "FCLKIN = "50""
[50%] Placement Phase 3 completed
Running routing......
[60%] Routing Phase 0 completed
[70%] Routing Phase 1 completed
[80%] Routing Phase 2 completed
WARN (PR1014) : Generic routing resource will be used to clock signal 'clk_d' by the specified constraint. And then it may lead to the excessive delay or skew
[90%] Routing Phase 3 completed
Running timing analysis......
[95%] Timing analysis completed
Placement and routing completed
Bitstream generation in progress......
Bitstream generation completed
Running power analysis......
[100%] Power analysis completed
Generate file "/work/impl/pnr/build.power.html" completed
Generate file "/work/impl/pnr/build.pin.html" completed
Generate file "/work/impl/pnr/build.rpt.html" completed
Generate file "/work/impl/pnr/build.rpt.txt" completed
Generate file "/work/impl/pnr/build.tr.html" completed
Thu Jun 18 20:00:32 2026
+321
View File
@@ -0,0 +1,321 @@
`pragma protect begin_protected
`pragma protect version="1.0"
`pragma protect author="default"
`pragma protect author_info="default"
`pragma protect encrypt_agent="GOWIN"
`pragma protect encrypt_agent_info="GOWIN Encrypt Version 1.0"
`pragma protect encoding=(enctype="base64", line_length=76, bytes=256)
`pragma protect key_keyowner="GOWIN",key_keyname="GWK2022-11",key_method="rsa"
`pragma protect key_block
re7qtHi9+r3xIrTaGHyCuJaZeiACCvVBd+enqLIkndqhDwE7qXIuXxiLc2OOAtecaLP4NNv8urTp
UcdqR7OHYNdXDHmF4riEBZj0vu0gXZl0nzx5incw5pe4cHpNILXd2gWVzA0PwYLTeajHGUZD7UHg
Qc+b/U8W5g5rKBIIvgIaWO+q1c1wv29LrSc0viYVrX/lYoRpcCUTJGjTrF87UyA9xrZGWG1UEtbP
q2ARkOIv1ttzqYeJGLpY7zpKZEBCcrf+/zvMfzwfog5ZBnnMGsErs/E95r5nTuWn2xplYSSjFuPd
zCM0Xxh4eOL7z1uXke4CJNfNifNxfx6z99dGQw==
`pragma protect encoding=(enctype="base64", line_length=76, bytes=3760)
`pragma protect data_keyowner="default-ip-vendor"
`pragma protect data_keyname="default-ip-key"
`pragma protect data_method="aes128-cbc"
`pragma protect data_block
Y8iGIZAbFydKQUTnMr3jP2MjHV98ASPt+lfPoBYnoeIepPqMztMEYGs85iQ7ADbByRdBrvJTZaG/
SzbCFurazn4V5LxVq23QTSGKSg114I/7SFDbuYiny425alytqy0XP6/4IsCJEWTcyNQSB7WoBA2F
s/zE32zxCz+PZKBsLkjuaoVKbbvF5/lsHS57LNUb1x3TdAJTmReX1yIN948Xp/XkaXpA4JqFLhx2
aZW2qjF1JqrfyMDty/PD717kptM4HY7JSu13g2VIFpaRpEBjSVQFnF01DfkEnXxJrekzL6tnY6FR
0XfRIt56BsnZAEwyshUEHhMMsbO2oMXoXaWROiGKmnGJKP/Dv0Z04g1pfwEHFRoTUENCkV0k6tnu
LFUgHh8KR6EPO0D7GV2Aazxza3+A/rZD8Qem0xgnLxcluwgyAFVV3RlgvGPHlDMla79r6rtRZLWI
90Gy7gqoKLLFWOQkXScq+F8eT3KTK64dST5/nLpiUUmdW8kj4piLSgWfbLOUGNZVzOq2dKDKQ/ih
W9qC4NhvBMt4fzvZpheTaizw1sKFsqpq7bG16nhVA4tYHKIFMwUIWJISFGkWedn8lFsC+K3ueE5T
nrD1YiAB/1NV1wKGn/KEJs/8qbMBkgvgFonmv+eQ+Es2RjL2+RKhs+IPtA8PGsHInUmYLvJyUjql
MHHdPmQvZ7NdGQ/m8HfqtaYt0Zz2Gq2Fh4HZvktWWjgCLpy/7nL0x0nnRF5etLMJvQFrxjcgBEiN
fkW+wOZRjMCvi3TDlT9UabQpMuSFvWZ39ZiDYnCCCMjqFfpLBiQRgJhPBq3Eh4rwYLwrTQSrHLMr
iT44E/Lt0xjRICzwY6UWR+In+NkMMJat/XZPQPKocMEhz+zmeMReb2H5SzPdmGLhXlsslPPSQn9y
1s1EmWSqYoVvaYE1MKep8XfyKE64lURpxbY+dYD4tjzB0WHG2p9OY5PM3iZXv+54lRi8e/cV2DzQ
/lz7NcIeRsMjaqBj10TjJBAUoyuSp5ekb8ojVBsW+4SLeQGJ1YxFX5vBUwF4FusehhJI5JOHc1ds
sHA0gaHPkx9DsdjthztJqFRie/xu/VHjMfCJZ4/u79/hRn8IQMUUWsq45fTqmHoUI67wDJBehZwX
W3u23x1tV6jLRwU6q09ta0wKaTKCSkE8ZJRhzA87oeg6V4mxuoYCbioK3aUKXe49phYs9eOIHNEB
naLVte/CD9j/vda7q3PajvIDYXbMR8QsX4UNrFghLFclf3i69DjU5mqrC3aV4FRJ87ygHa3rFcAZ
SaQRFutvah9t093zPvmFfb+C0hZwsV6dyADMemHYtDkPiSPCgGOqx9fm0srhN2gBCQTT3+24I1Sf
zhyt+VT7Qg316HlMLQA=7DeYCjvJBDTxtTCXNFWXrV4+VljHa0imXANFBzSMiHIjH3ovipzn/iTw
9PSwuMLwXyamgoCkTW2lj5ye4nohGEbRJ+OL62j4QC6ylMnI5d/Qa0ZebEkSjOry5vdpuPBQJy98
kp8C2RvOP2/WX4UAG8x56Wj2xgz1Vl+7J+NVJd++tHCSHleYeyqtDGuTi327N0yqBaW9paGRoPJ2
JOdthK0O6D6R/5lzT2uqBjAZbLQXOUb1bLDnPNlT5RGwzUU6ve+kcMP4+0QGelGOJvacXNDCfKMf
mJSflxAD8Inv+pNCFdfh1n6XedxoUGzLozIT7sndHwAI4p7ZT/qoExYX7kU+Ibg4jdy+N+mXkQS9
3aV3ReAUWnrzezKuBhDSZuLFBfPuilWKJ1wfoa2OWYKuCHhi7gMb3v36+nTiUv1tWl4lQbR7A19P
hRC4ccBCu7M9npduzS4rOLKHMkyznWEUInL9Uhr4mp/qslKQ74xTJ6xYA5OivSJViX1ASV7T6HOU
N85AkDlrBH6BvMiBWqdQnpyhlePQ1S/pTDcdqRdzHEBwS8Gs8sZu/akAy15Bs6aJQ04OZSeZQP8W
t9wX9I0m4lDMIfcLobTqKj/qpjdWoywqes4Co2hK6fKByUaHP4hmgDVRKCCaMfwObIoW9DqXnECo
te30LXqQwTdvytUnRLTAYhBCoI4fbhFGeB3q2xOj1rBhmFnfV/gZpHJLKnWhWtKgI2kRU+dIWx75
+rNKmY5Zbgl9d05OyEYw5b0RajwHos+1oJaaLOH2PPHVq4m0ge4TOC6w5y/gvqxcDHZpkiepcbVP
HlxGXeZtBPNLEWBLQKrt6GtPk7qk3pokFAdmWRoVXjIxNCDF4J+9tJUyWDimXDSIDZ3IDSJh/7CP
1Ey/ichA2WY2ISdF97rr63I5FxJMYIRrncJtVQcMIRcsFfQmLwevOizX4K2DXg4mNPa/e4kwHFL1
jxF3eqg9TrPuT29/7IUUeXOoeuLry1geRXW8t0qihNtvdHB8Fk4hCH5x99tDmfifpnOg3aQtlurJ
zerw4gYFuTiKAUPYGgT519g5sUvrSOsFlt6khEnoYEe5ZqAhTmFX61JuTXCgT2cUw66ITfruqLIt
Rz7MM7EsvM5JAsIAG+fEJX07Lc0AQ8g1ZMhZRVtUcjq7YhNufOMoI5wx61wCgPkUmSVhl3e4B+dM
+l7SwMfXiEO/zuyKc06fDakGFRIzL9e9ZSnqLhhZ30Zi6TKYY4YEYJqoG27+50gmeF8V6KpWdZ1E
LWoaJrIxDIhFbzSiJts9fL5ggwPexixv+eco9/uedQw+c9qgkJnSPzmqvfMsmGsYCiZV94HZq/AL
O+Tm3jmuOkQPZ3beiw==r/irzeEK+6LrDRQjcV+J6a87EF2tURZvvw9oolk0nlFnqxdaeJqPw37V
DjBnF3hHnhAMLovfonFy/myJQ9u7JDxg8BzcPdQbIng9J//QPxqDXBwBP0gJdT8Xo6kIM0xtQsM+
Cng+dhuj56rnxkeaFRiZrH2NiuRtb03W8ia70RmyT4DlR7ITi1fk/1id/FcZICkTHAgJJRkKMNvi
FaOaZiwRaYqY6MtTqG0joQULUrht2ioFphgv7fpVQEzkTRrWnsWGy3d638E43Tur39kkmt3gJoRE
7+mNKhnq2InoMSwvNNBiSBL5SnRmX2THzTvclcWEx3iDHLdI0KHldGTMgaTNXeqLN6igk2xdujiY
i3XWWIDmgtSEwrYn5IiI58Ezp4FYoDXMzhXbetxPB6Ku/HQo0cQpQYGXr45LF1edkZqzHw6WsD6C
/XC/3tD+rNRKpsioDHnep4Dy40Pm45dJOLYDQ5tnxgnY+kqfdDcpyZoTm7hrZeo5ejc0vvRte3Tx
cnD13ZGdc1y5epZg9d8qeNoClTUTbpoJRbYHNu6dsi/mcmGmWQGeuo0vR4D6OMdfEY8Y4EKuJs4F
RBenrHnYTN2vVaIYPyUvYKV1WlOXuvdPA8plD1dZqmGFqSXThmkMD7Rq2cwCi0EcUuWcuO80KQNb
uzGYy0S2NyMCRp06vwi76dG4JAKPFO97ad222f7OAYqfMpDXqfO31D8AMXeuJ0TvHp1DuhfoItCh
Q8E2WEyQJba+N7QaL9CmaXXiEsj0uwgZvYzo3r5tbh9NPcd8GaWTJ/bt64rWuu0upiQYJABK7dgX
7Li7wPM8S6vhIMXOfX8kQilhKfnx8vXdeNPHPiGDVBf7k5nl7zvrZsgpF8rq70aruv3N397Xc+f0
VLwbHAvTJFsqhGa+hAFZlOHUUASOfN5AwHKIZ48CsQCry3tkjSXA1mILN+Fsm0aWtXI0kyU/Gw2w
cL5WYsJTO3OHPNhbTq467S8m38cB69gntiBV1yBl3CQQe15YOXBJNiJ6O/F4NXI+oZH6oi8BeK2a
ApPGOyrtOmOTXxYc80Y/6179FmEYMTlxNjTngd/dWdXjlg5iLiIOYOQRNIcHmKtJYC/gDKheRPqU
ETxgwkBaNRF54dnHHDjlHpXy9aU7Qu3RzLX271o0+q5x6srXIRqSKs+JN+UZm/pcmbepp3qCLzmd
P+hMMGOAzO+j6UVpByv03vSP3PXtLUMXDpHAS+QL6ezfLQvXqzhf7kz/rXrC1TuFOfIBHV/kPaez
QQtd/uTldMEiE6qkAVjdJ4om2N841dyMrIeDcDKPJVu/0e7SOTTj3yMKFuEXsdHrtu85z/uU1soR
bGHw0d5/xfdSn62j8A==oe+apKcglXto2Cu+byMv+OtG5JRctUOe32k7Axw/gs5UbauE4GDkP52o
gc9NcY6EZZKSu33aWC7ANK7YsyrzRLqAAbqBkSQdmkRfuqBFp/yOu7WnXwcyh7YMCb6j9tbOjMBo
crpYBhdXnW/kFZ6CHr5qIiq7I7bUFF3yYXJpmstahKSZv7sEpYcy8RUidK+tqYTViymhf8Nc4vhP
FH9GI4RAzEXo5YYTQD5itwZ4nFMtcn8LyvYmgElWUvXYi3xM6F4jgSLDyoWMbeFGX+bdCkSdVzyj
EhLwNVrzj3Ht1rqX3QuDEcR9j1SEWUbICsW/QGnx+g1dm3LAg1Fa+pyiZ6b47fND6LTFdeIraHAr
BTbi3Nh8bkRY1YPuE8kj4IDFwbxXDyYR0Fu6GCLsxXCV2KfgTMC+h9+DtMFPt7YL87DAqncF4cyE
647Tf11jrl8r8w8LaJlE9XwIyLc3j+w3mxzpyqLaoFNABmzauEUahcrKzpw3PDjU57racz2KB61s
T6/hsK+rdiYAnOtxzJ/ETssJhJS8MGjdNqqy4deVcfxbfE2TsIzfbBltisEojC+1DCh39JMeLG42
8kXv8u6p9UB+n7tchfmgvC2dThS93XT9pMle4+SKsU/K/rSe+1Lf/AenXCX+KgTnt96Tqw09JZyV
qJpNz/wcSveh+m5nvNTieybuF5OAGlGNjVwocu69S9dh3lr94/y4UoOoTCg3InOASFBglU75/3gU
Yd/OkOhQPRzb0gF7fPmyP9MkVoGA+bozIjUTapb8sobyPlTRxrPTcffbzAGhADHOkNfoP28oqXwT
t8NVVnGCiIFzmD/V+/mRC3EPitDtrEzgdJ+i9tCX/JZ41SFpWi8lDUatA8Ns4zvBhF0k4o1dMLiO
BEIN
`pragma protect end_protected
`pragma protect begin_protected
`pragma protect version="1.0"
`pragma protect author="default"
`pragma protect author_info="default"
`pragma protect encrypt_agent="GOWIN"
`pragma protect encrypt_agent_info="GOWIN Encrypt Version 1.0"
`pragma protect encoding=(enctype="base64", line_length=76, bytes=256)
`pragma protect key_keyowner="GOWIN",key_keyname="GWK2022-11",key_method="rsa"
`pragma protect key_block
xRlSVAZOCl+oc0wwK5x/QxFzdLDy8+a6UzvY5W0EZYjp0MYPjJfCumhQvJiWSYEGKSmh/+3SK0wo
VPInR4En7e9CBpSKJQ+VDEK2en8cisK8SuZOPldydNbHy1YOHLFzVTEXaYRIKOyRuNVOm9v9dtpu
1JX8iAS0+KbH6HRu2jRQ5vXCQRK2Rqgotx8tiqhN/7gJQjmT/6UIUmf5L+D11MKBSNjY3u1JF2D8
ZSKEBUJ2drgICEwOO+x9GMwsCtGIuKGRhF6iuhp0U3PyS9R6/IX8AgvNdwxl04j6am54q3dsj2gI
lRJYyJOtbi4jxVnYf4CVfKBmHBjEyUXNDrimoA==
`pragma protect encoding=(enctype="base64", line_length=76, bytes=32)
`pragma protect data_keyowner="default-ip-vendor"
`pragma protect data_keyname="default-ip-key"
`pragma protect data_method="aes128-cbc"
`pragma protect data_block
Y8iGIZAbFydKQUTnMr3jP4Y8Fsl4RBYAoXiY8+08gr8=
`pragma protect end_protected
`pragma protect begin_protected
`pragma protect version="1.0"
`pragma protect author="default"
`pragma protect author_info="default"
`pragma protect encrypt_agent="GOWIN"
`pragma protect encrypt_agent_info="GOWIN Encrypt Version 1.0"
`pragma protect encoding=(enctype="base64", line_length=76, bytes=256)
`pragma protect key_keyowner="GOWIN",key_keyname="GWK2022-11",key_method="rsa"
`pragma protect key_block
qkyuWaFNs2r690ewIUWpSZG5zSXKHBl/hQ1W3PaELCImlDhFMaqYMEmp/5jvg1AXT1kz/C9SyEXm
qH4H8fpSOIRh1WtTd7+zKm1+U7l5rp6/iOgV9S5q3FA/uywQW+CezAz2KPiFPSZLNiU4+TU6V0zJ
+rDWyVP+6Vd/NFz+3EcMv+2uMFJkePLxHNxxJ+fRhZN/s8RMVHCj8Jg50TvzEMlDkakEFo5bHFP5
zHVrM88BzDbr4TuM4JRF7QREKrUoke6neJ1tcy/sLZ3yfAXGuhXePcmx9P7ZRb7BCRS0FcOzKywn
XA6ihlVYVnHWe4Bsw101jKQSNnMcgx08/b4BUQ==
`pragma protect encoding=(enctype="base64", line_length=76, bytes=96)
`pragma protect data_keyowner="default-ip-vendor"
`pragma protect data_keyname="default-ip-key"
`pragma protect data_method="aes128-cbc"
`pragma protect data_block
Y8iGIZAbFydKQUTnMr3jP3HwnlqM0qLPLLYtK1AkR3b6tXlbd3iQSsnc87H7MaxRsbwcQsjgdP21
KklYElSq22e4NzLJfyOu2i0XIydwHinKceAv/1zTef114BpTGRXe
`pragma protect end_protected
`pragma protect begin_protected
`pragma protect version="1.0"
`pragma protect author="default"
`pragma protect author_info="default"
`pragma protect encrypt_agent="GOWIN"
`pragma protect encrypt_agent_info="GOWIN Encrypt Version 1.0"
`pragma protect encoding=(enctype="base64", line_length=76, bytes=256)
`pragma protect key_keyowner="GOWIN",key_keyname="GWK2022-11",key_method="rsa"
`pragma protect key_block
VXrO2m39iHnieTwPATMODwXjpB8iQ6vo30RU8z9vBAl2kfapRgnxdTBsJCxJR2+bZOMCMKX2OnsJ
Onv7JvjC0hyAhFa6M6bL5iF5TrgNUbTa8kCPhHQhml7hrtauR0No/0hCOPKYCRb/mYxbmv77Wi07
tlKj9eqTUpRT4o3zh3g94qZGtmJKUkx6iJDrrLYK32BdOtpg9Whv/Y5RcbskyavdyEbDOus6kax0
omiJ6FHjg44BgK4FJjqJl2euI0AG6hhQvw1of0mlqG/ut5Rzt/x6qU892QBIL+9y94m0Ue6SGmjH
UiJmJidlP5zOUwEYEsJO5bZYq5cDVnXH7MZmGw==
`pragma protect encoding=(enctype="base64", line_length=76, bytes=5904)
`pragma protect data_keyowner="default-ip-vendor"
`pragma protect data_keyname="default-ip-key"
`pragma protect data_method="aes128-cbc"
`pragma protect data_block
Y8iGIZAbFydKQUTnMr3jP3HwnlqM0qLPLLYtK1AkR3a6whKITOAppHyXw1Y+lBYs13OQpyJiTyVJ
kCZSyQBMiYXMek66E0sQzU2ZtcfcVT0gG/xVMuzvGzKO/09RsHFjKSJWb22Ar//fHka+NBSUTzv2
MpiIJh8WtAiG8zF6vmnThUyiwKWtleb0oaBHN3YR4dw5zg8zuTX4pXdExfIjnbQenb03FMCamzof
ozxUQtJ5cmGZK8/JnNFfVwjGH9GapLW85WDS3SnLgmhhNjZlwb9C8XKFEVznK85nNpQj04nhkWQU
lvrg/VLWMG1s6amYZNeHJC2WMtXucdxp7jaBE4Lme+Y68VZn+0F+MsKqX5ejWgHd8z4a0nXHtbR7
qyNteRudozGhRvXdQ5LOBhtLS9Ehh6ABSVxNoJgqAubXriAe5L9o3xsshmcW/trecRiGmJkmOYV0
1V50z7VXKsaa0Dk/YhU6LWPUS5N7YShEzBRHAIL0lLEYzzvEs4qHfV6QLk19kI05ElpekY59D8bJ
LQbPh8vxYyKCHK5a2vxvWGztRfxN9YWYWrD5aN9XgSO8BVoNnQS0iLY57Ucn+WJ4+/mMJ6ovhb6z
6jwv0NcDDnkBETLmSz9oPA2N+1U6wNKmTJHC4S351H7L1Ngg6iBOOckuKJcfMtRDfOxTCJ9qgWMa
1hGonRV8it5T4jJ91W9fj5Eg54HwPW79CO1iun45g1HZMdCYEjcI04DdiGcnt9zQj1e7vmRI6RRx
e9TEwQA848egd+9ivxSjkKGQzAM/0D/bHdn7G5SKTOg0VofSF8Q4haslXIGwOZ1HmpZK/fuuibsS
el0Dzu9nAl7g4isDfFfH3FKtQ+GKvTxe9NTl8FLc2pmCZuXxDE1gcRQCs3OBYEL5DQ50en+IpvFQ
UjCOgvqFHGnfpg/tG4DjN1WrNUzfeyIc7LdtcOWbsjDI0JrJv4xZiykKUB/P1zSgcsinRwxkowXM
dXhua9KHE0/X/v0X8CiXG5TLd1oIPKlXC3UXKLLeCy53b81diQkpFRQOQzyKDTd5LraaJCUu0B2G
/j3Mhm0j3vhDPeKNAFcXAy28C3FXV+jZObGb8TtoMZ53M/Qpkfh6o6JOESyXaQsfLgU94XslzgiB
TDKVVYMPt3AKwAFUyxLLyiR7xWdeQcDQ0TB/ku/at55cRf5BroYWiUksx7GtZRqvKmO2oXe4W/S0
Ibxmh76QFTQgnI3Gdx9RuDhcUqt6C06Nw1z1Oc5FlPUYNU2FWlyAiJX+Ae6CTyMS81Lc5Kz8ThNu
c5YZjHVSkqnAAI3HCrjC/RlB4lP0qXzeSoQ6FgYlsN/alLmThdfGuO/HwLFg3pJYTSdEsO0L/hdO
EtsxQT70YpIqQiXnrJw=o2krsxp+QKxxmv3OYNdM4316u5dbS0EV5c1O2owGYgjAV9/gHscuPOI+
LvQJJmEbsChPj+AJ2XlShMQqaoCjhngXH6T6DiZgGtLv31gvRS0KIe4z5G8avyUKaJVzoQ9yrIxh
36X1OG7zh6tinVCZM/OparxkqKxuQkk7deuiyBBegpIJjpS+bgNX0Gjtx2K8Cu11Feu9dOm4R6qp
cylKB85FgIrHjk7c8g/OoT+oFLTuBj8lGTO8vC46wAvarP+2Y0HYQR/A7JzMhvRDbbj4SSCn1gmE
MG7CSnapIWnDCEz7xWfbOy+gC0lYRTsKomzWwF6VuQbevOJHwcBfUP6tDMxC0+MnPtS1fZoX+bMY
wRITq+4ShB98BE9sqA3VrynIKCAuS0sXcDGj2svuyT4pawsUoChDcOqT9YU9scSGXHLd6isx1dZB
6KTYQTBO/aunqYBBfMHYKLpbA5xfqkEEfBhixdbPpNV3jKhKDtOO+bCctdRr7P+WUeLPWsBkj2l7
nQk/NNJbdK1HjtMH5cx3YUEt8or1PWCbZjN9DbwtNUun/uKJbwX+A8l2XQolBPlCrShNqaKTNFvq
YN2Ewef3uHzSxq+8Cczr49F3zwkvGKhzW+Vcyb0S17vhT193IezFrtgp8v4DghKPaL5tHQpZu9Oo
ywaG0oODSfoxogIBERpUukQaTF8Y1ZEhV2o9OtWMwrFP4O+RT3k3fOHavbUmxZc2x3zIlHty6BuO
JjFuHgXgNxSK4h3CEmxWljMiKLOdqeETFGbs+619Sy1P6rumvsFus65OubJihITJYnUPbMeNl/WE
U7mqCcoM3zZheLqK0hSridfdtjqACvC3WLYrvxJ99jlmflaQUNR55D9PZf7Ll+PFwZ0oZzlHFXjv
+HMCU4KndnSYgYT1YB2f5N1XddAEf2xo1TvqOSLUXjgPkuOekevQPdJJOhofGng1grxRqQ+AFbsS
+UbDJiCSCUYZdAa7mcSkU1Uglu6O0adgBPk7qIt1ik80lOEGTJhodP4z61B/a85KApTBa5786YIh
mNgx0b21BYg2c/0z+y5k2SHCUf8OzUvRTMVjh+wSliOrNzvf0RCrXFJzdF+OWW//fAKYZJ40qptp
4QFtActsk/2aLCJviyAAFD/zAe0S+rXuNRQCeOCaIfxq/Aieo7psX7BWkP5nCpj4/GzEc9Q/KFAj
RWqlupAg73x8JCYf1Q3c/NbomMFrT6He7Cz8JXNNvhUAmsNFYfMnldUwkTsUEvO1H+W8K5dCx13c
MXu8UmZnLLUnxWg7k7Qkc+mGgWI1ZFThKljkBRTJJzmT7iN9fWckXiLD6nqRf3BxSBGyoLTboHWy
G6VI9lGYSO/D563q5g==0gG69dSbcAEfpuAjTW1oPYgBV3ZenFk/ErupvKS4+fsvQwl529fSwXTe
/8NuQE9aG6PBE+rdjIginBP3A4MziXZcMNDUygIUAHzItEQNXUkJLhCZh+V5Tz37BNCfuLei1yki
C7IYxti5IxM02bGJ+M/hPbPjECPvYqvHoiA4FqIUB094wKM7jigFFkkkjzsxJRje4pirIVlzddcc
AMRBruR63jBA+0WwXio3QixcUPay5lTjx317DcMJbbQM33BfbjeONZ7rmaaBkplYVErcvQn5R0AU
YEcURBh8cXA0KHSXEHstq8SYTDJDJlcNWbVDeaeLQjk2vmKnOa0sNcBWpf7DgMRjiZBMimR68f91
3Wh5lf2+YxIpIgIWquygysFNcyKeuU+OhawhcGqbp7kps/sZhVVWx0y1NcLTM0/Aq9bF0jRHJeb1
ip13dc9ollt6JdO1qySKhr2+ca0REY6m11xK6zfUJKmej9n1srMQ/7PKylXO1uVCkApVoSHgS+uG
PupC+/jyValEjyJsxLBJzygE+a26TNcTcTRLx/VrXFuQfDzK1AIr/fudbkuNRtY0DZlaol6vDDzK
kDbgtYwy2jE24KyG5dP/UjvVKoiPRjgfyBDSxJ3bnTv/7PwloFdTf1zbIRuuG9YnbI0RSoGOyCzy
+CroLDQOJhJjYdEkl2EracbBzS9RfNHbszj+ZSDQ1f4gb6lNKxySdCdHfh+SZFYkbmsi/nb7h2xL
Px5Y3ZsCvp0Mi8VypKsO0HO1kb5iaFSwZxVbORQ9Dr3QYdI42xZJy7121MvxyKrM/AA0egWrpMjG
GsntH8M+pcxbHwWHWcu3DMnXTkzFBuu1Z/FBtEkNE9Y6YLc2NX0rrbXWwSIMaKsz3us/HNTV6jsy
BsZqeDVQoIvv32XFXdcBGDp24X2EGJc7Nua0iNtd7/fgYoeBFDaprJrJEkmXpMcTMTvYruBuIsxS
V9S1J8ntK32uUvakic9LqwW/YZKdrrXqavgNgfIaXs4wuQiT/8+835XhPKCdeEtpLfaTaT67OKVw
uh1Z3tmVFYNLLIaRKy1zPmhFimkJMzIvaIKmp5o9uAwfkfRewwCBhk5uDE/J7rdcMwaBz2s6QITu
76xHtjO6pgLrYoby2QOUCjNr8z/7BG6TbRchYcp0JgPQ1a0ddTxjhOAlW3l1/ZaxrgRcF7+2lSGl
ohAf2ClLrgy9F0G3M1chV2EtF5MwmibcFE69MDInlTR6LU1kFTZnai6qm5u3zveKh0XhT6jwlIMF
A552NoSDGiaGr855k8iKqDul4aiIqTJGk3wI7SnWMb5YGrgwoSy6G15nZ63n9VeFdwfOmrsy0kzR
k4a8c+o1aKNKE1gdTg==HDoUIFdkoFfRWH5bnI1Eba/vZgviks1ofnc+VEE8Qk+v/ouQuw06UZNL
/7+lq1NkrtdERyEcx+hQFwFIRuYmw+2l3zf2HqEQ6WWaw6kC+ML3WP67Dd2pQYfToONErD+6ZJbK
nYEviqua9x68zMw4Y7rX3D1CPJQr8EjmAjN/g0aOxt9Wfo1gMZIQHdWimtBAS9/+jsrt42ey9YcS
scMOHPT4I7omA2nXY74KqXVSkVelouv29VaJAFLvOu8iPVUuf1vw2gsdArb9gU91POkUPBN4wGYW
sx7O2pdg+5C5ZzirOnojc6i1Ccki88if3w8983eGq3x/K4Mm1gZa578W+ZWExYXNxpHHIAO37CYW
DL+9Z3O4hwevrQUAyqy+VZBRlXcUvTEpD50waupYDKrJeBgXWuUfy7CMbtMkgtC70tGQLjhTnrX+
40OgewRxiwFSGhO0WrKAh09iN54rA03ONsvd+ty2lJ0peD04wBF2hM7QK7JPilm1LQskf/k74xEa
EtbczIH43YvqfrP3Z2Emo8IUeI5ymxn5vb0a4d6HWzVGHWwQznNsSpvjr7xzopYxe2P0kPvirbPu
J+oDC08ZKupbm5Q9K0XIi+RZpIcmq449UnZ7pVvQpOoeVQKDIbHNKmj9M1kKFAaqIIfKv2hwCCwj
WgM3BpqcVyUGX7k+UEzHhRIu3Cr+jdW9EAxJsv+2YLwo3lbazuwUj6l50Q1S7BOnhc+C99CjHUEg
a0ntJt0e0MHE0hc62dCz02Tb60uiapcC4TkrrHugJJ9NwaPjbVGroxQCBX2bJIRNjipRrhgE7z5e
Euy44ufE7BKB7kCUa8xHG9DrtD+g/VcpDYxM4+WuiPuFJ1L6hRGLaoF+VichBTa+SmZmodNrYt2+
khZTK4bWisHQqdNXtgqlKpxCfGumg/gWS/gk/Uz2y4ewpu+/ltxzdSaxBz6Spn/0YjUvGlaN4/hw
MQEkeu4xmDDMuO1dnypwtfSGskIUAlMtAdkUX84baS9uwEUXUTRZQc2tE/vE8KqLcoKD3LexQAno
OODAisMtcqEgfWJr4GYIQkKoGZ0KuZ+2oWbrOpuSZ7lgx5bF06TnYGCJgFMjuI0IccX8AKZcbA40
Ecw3hm51tXn71aaIR7qs7HTVjNsQmhFaWyxGFCncDoQC65b41Ks8tZLPzpAScj82Z/kxBA+3dt6u
Ka1CsuTc0ZLYJDHIgG8K7oK0q/yzV8eUtcOjyzkYrFiWtJKsckD98LfdDsjTro0n6l1KH0JYSOQi
mNrywjZFl4/1MFkSTju2AQ+/m3HSi6ZuLBl09i0QvCUwk7ND0N5NRxSOgdNdikbpBzoLzxgchrpQ
iQ9YKDayF1lpIBpQvw==tjKfLvzDtcaF5q0iFbgWynuFaBAyb+yGavNqJzHAY/mrY91tFL+PT80P
Qe+9uxHwjRdtuT2lgUXYmXxSeOfN/JNDBRocjG1nDtMOtLktBGh4m7Dyad7i37PvM8AowJgk5279
Dv8eznBp/8X7ghjP9hC6j9nFZQ+Q1SCWoVMDOlGsSSwU2ChfhSNb1ha6atOG3h04k4XgiiNHNBX2
T7OiVO5VMpErEXcVnu2IY4ZTTwNyLtQeEbrtigD9YMzExtAJ8qzQWk3l6HwyOGc1Oy4fCyCFkyhd
WyZL9VVPOKAf0ulFo+EoY/FVLbvMVzfrTgAZOYkZtZdH3jeLEgtpo5fu1nPECHRp86aRD6q8pJfS
kcxypXyGSdIdfrS0tsi97J+yU9uaLI2nJu0wu+LPEKdMxnKlAlAVjHQyiHTbPPTggbfSwbAVNP+X
ZhAMJM8lIsLMhSBVHr6T28w1ZKtml5+35+wPYwlkZhG7ERhnr70hYQr+CJX9AQUnshTt/xssI9mg
Mbkla9CiR/bqVOtwme4XnxLUZDz2Tk0B/3xC26DkqF1k1EQH0QiAr3UMGB0R4i6vBBPfzvoGVPfe
ingIYXmPkg7la0uptTi2K8aoMIq+/iOgb5cb2wm2e4c0mcLoA3fGanChZVDIXKvaKzi01HWK5zuw
8D4oLw+/aUqa1xxhZsTk6oHh6tiXp8zZWjk0XznkjJo6uilQSMCvYnAu2ciksFP5XrIg6MWUk4Tn
NOliEM0+0XC1Wxh1ndYy/wWxINP4AoFTWXjjWjVyWiuMK4RqaqFGqnlp0L/a+Xaja22Tgl4ZEVFh
9116Oyimmuq8m0g9cRgmFWNZurxoCPyZWP2Xls4F1OZsnq7MIYEaRXtlLkLjL+f03q5mkNBfgdup
JHwjKst4ckoTJzOwkrfIALlWA8pxrqPrUOoCcSe2XS/IM344s528SZR/rqPbYd6oxLJhEzL84KEA
6Gu7ozI9YfqBwo/3JdofMYHhvvj/oHJe9h7ySGybVXsdoemn5PajyxE/G1I7bUb3WLGSpcNg2lMx
VlNPNWkm15Mfvfz8ebyFolqrpaYGzmIBRJ/etAP4AvcgTlIk0+nEhhaE3pc89YFYgIu9PqZULKM+
sfZsafIJA+uFKyEeWuVD8KVjgYq/YPd23Tk5OBgMwt7kafrfKHX9Q/G5KE6eh5YVp+Hlu1/AqxtQ
frMOsATEn7smbr9jJCwM+Oxw2oUTsU4p+44Tcn/h3fnEywh1j3XxLE/Se9y1nEYIXpPyECwAoB8u
l3iZeGyOpSn4+9EUZzpHx6ENc45u2xaWK2UevxsPfTKt/Ovb3hNaNpa9H4nCoWC9sSk41pDS8FuP
MalTGbqU8WAHEQ1Srg==nNy8AgwWITyBeGfDWcrChpbaA52xh7xyVQMaUOa3mC7XDko44KvXZ6b7
I5JR9oQoNHKsZ1dIjqaamschVMIyLmnXoagmZzy8phPjRjPJScK1xsv6IcAyuyGpWAnGyQ6c8D6Q
rg79tTwJiT2XTARbh+LRUwCZUVBOD5EP0PcX1TCaok3//m5Xxt4M0zJ8Nrv8bVcG7F2kcowXTj35
xDc9bhNAMuhzZQ2P3MU0t3eAjde2q/L8Xly9Eaz0656ZiOUoAwsBIBvzdA8ApoikpdPN4+lz9s2T
K9nWIvpz2eY6T5cnFOPxYBJa1ri+9jHltEX3PXgqNuYs9o/XN/ixI0NWO5XIUJQHvQkoF6+LU/BC
woWqpRjvj+TP+Lw2U6JiNvW4R2fmn3YXW23QuE33CoddD+t3KcuLsRr9QGtRHSC40owGiWviQgXx
eIKDVSi28NoEbcyGhm1D2iE9wte5CvBFFzto1JZcouKgn312acvJdvVHe5+QZv+UdlpeFqLnpA62
1hFjWCFVuPxjQX34+PGopYvGpOTX9EVDwjAlL/CdRwkDkHGbstU1y0pOu6AxPPG44pcN7fVUGUN4
wbdPWSNjiwnYVqvo2Q3OBgnEVkRBm3d26xJHqZiKq9KifuKxv8NRGTveatDhg9Ha0iypeL73gaOY
AAcf0+f+18XNKdHk2P1IeMlvK4K6lrkHjljm3Lqks0A7njgezT9GHeg25oIRMI7wmsZ4tfHXXJor
KgmzZHOAw/r5T1OGSYphPZ+N/UnuGkBDtPFnHa/OyjquXBu+9ChxvOD2xvReHpP9N3+AFIKkgRKC
CSOYn0Zd0aHoI7IcmDEIC09ZwmJyJYpWJAx3HtKqzReyz5lR9Nh/mvypmrfUgBbh+EuNSvknekVZ
Fyp2QBXV23c5uxg0EaSOIWf33xHptheQLqqwlRpJxtuH5w1yUF4psR1mlnUlB7oHnrhNACgUCo6B
hrtjyKZEz3CGRaZsJDCpQniIYvyypZUBs8hNvjaazW/xlgfAqaiIQgaY
`pragma protect end_protected
`pragma protect begin_protected
`pragma protect version="1.0"
`pragma protect author="default"
`pragma protect author_info="default"
`pragma protect encrypt_agent="GOWIN"
`pragma protect encrypt_agent_info="GOWIN Encrypt Version 1.0"
`pragma protect encoding=(enctype="base64", line_length=76, bytes=256)
`pragma protect key_keyowner="GOWIN",key_keyname="GWK2022-11",key_method="rsa"
`pragma protect key_block
wX0I9piKM22RWIbJadGr76XkrrDwKYfwVW1ssvXI81ATY13nwUp8gnCZoSlNblzwZw8Hht2uP6dG
ewCbRieSSxfZW3K4PsRyIKfffuLHdV5gUFdDL2On4QLEMqekuWYsyNbU9YGTDwVr/eFGm/OsAlM1
wNj8ciGJNHC4MCyOfmh+11GANYW2TUlVdh5ZitLaOZa9l4um94Lx7sM5XcwFir6AuG8HN4sNgvZi
Jjdjd7NzAiEZyNgio7c6lb9YxVbrU5LdUAIyuMwCuDC5+9dN8vbJdy+7tOQQ7BW31hip/4lUlTL6
Nd9ty+8Xb2eEM4UjldZdIxi+OnisFLveWUWzJA==
`pragma protect encoding=(enctype="base64", line_length=76, bytes=1840)
`pragma protect data_keyowner="default-ip-vendor"
`pragma protect data_keyname="default-ip-key"
`pragma protect data_method="aes128-cbc"
`pragma protect data_block
Y8iGIZAbFydKQUTnMr3jP6xZ26FwEisEzPtHuGGI+vjWirUFru38VAWKeo4ghz0Cm9mXPq+L/pfX
TkzqTin/mYCfbBrvFffb0D5FYQ4bVd9tMHKf9dawuoQ/0SjD8m9h5hARvsV/lIY/LN5jCNwNkBcx
S4w7r+i9aA/X9K0ZNNEplkcvSAUovCe/mgqwO/wmB6CktQPb9mKWgak7CVNlTsbhuPM+3UDOB42T
ykguIp8q2agzuZQpYQCH1ZMWBlSC4B8WECMMMF5crWUpWuYT0okoSUuoqO8NtYoU/84xZeEgGFi0
tjzbacjQAGHbmt/GL/5rC5CR5lC0bJakSBTpr3f4R9WdqcD4oCZwVYqDwn9pm1/zMYujxrr2ZpKe
+8KJ4QWknD6nzq3XmSYbPSoxsxScZCupCiocgS+Tztm7iWj5u9zju80XZVWzVF+5s0SqFNvCVxqx
9DJ9slf9xYyr3PWan0rKGyW4I6rzRkXxZ7InofUG+xJjvguqUO5gGKPLV/KCeZ1ZIteR241/L5fl
tKIsChSxNRpX/PkZe8lxZfHDadhP9DJJNoz6gCCxh5Eb+CvyDa5hTVMHokwyr1b1EWeZ6LcqZyb8
EfhnFgetjvf2YBKtyZe7h1pnp5QDFERFB+EapT3P3q7j8ntSy+1aqIjFyOXoVfYVw7HpQe3+Mbqm
fDBfMi4i+qEKtva0ewYQe7H0iX69gKAvVDiw6IK6/ncHMi4/3KjvfRYPdGNdGaJj4Tzw2hKFVZtD
pNDXW/56mND9vcGey1dlbGkoa5hPEn1VE3V8U5SIilg8RtMUPX67RrGzNHbGY0S7VmK2kES61pTt
G8127DSqkjQB2wkfmCiB/RzlzgAk0HayGd2R1/v8zjiYpXM0ZAffNlf90dXbqWEbeuk2FyS2xaQn
kKTlQdO3weTKdx5XZIZZN46sVKehbFwFHpiCcKHwJsTyIfPHo8ns8NrAZROkjjncAQO6DMgy6HTa
sjDjzpTrjHUUrC/KVqxeu37Lu2dR/RnvYQWHEigpoi7AJePmQPNDRH5IFBm8u5qmklufH0sHpkOe
10ezNNCZSlvqRjwMnAAKS1w4cOuMWUEMKtLz/FaaRm7XqCESBEEsRe1oHMl7zjAzyZL34QbTtkeQ
rwd8gIWlaGtUx5JDWX8An/mBQDQHdw7IRFP3hwhSuB9A82+wCLjY1h0SwTLAmx7DHUAjZ6FYRccu
5LikXjaybmu9Qpcu9KWphA/6o6l8ofUJ+d9rWcRvY8SrUF5rPmXclBVmwi1fyH8yUcMDpHg58+Gg
GS2c2+IF8Zt7xm0GJaCgrIWGJTq9MS6lai5nT4eWPUFccNEtmkauOyL+SDM7TAIrVJYaRHntpRCY
S0BW4D9PZ5pB0AQxn1g=rcEdVII9VG2WOk5d4iI14TDySI7hpbRlpj3Z3Iqz3Mqfj4ELbIQUcc/v
uLW+c3U+pEiPMUcKoOR8IIN4q1Pe3XNJI1/oHG3Hu+CJbXB8qgrMoqTtBYbYtZj3c1ywIYK4q24p
/CeMtC8fVaiWKvAQaLXeeA22ln3B2UXm4lvuHdWrchmBXYAK3ShZKsPrayECGpBmmFbQMRNAA8QA
PAqKyWPSacegpIdt/n7G4PR+LBY2Rus2eD27EBVILByexiXsqDVuChrP2V8OMhnG0l4fbo2ne0z7
8m1+IIFnPl0MUCy7qwla2/GOZoxFNMLrs1QmIJ1ldNNNEjndeuwKEf88tbDpKti7SWsKtB6wnqWI
QCpqRLfD4eT047jQ3m/UgdPVHnhW1580/LagjyFMYVldOeAAE1CjoPkSEzD8sjG/2PSaSHI0J8ds
4VgtIc0z1zpJ9/8OA3edVUOoG4ZrZtZASxHfXgBoagNygokDr9lRc1PDaBzUsALv0BGOC57y5V4z
PwpYUE9wfQVHf7pKHU4UrDu24lj719FbQrpzAJRYk8HsMsQswqSVRlrTlSUkjUBSgHYuWSb7S6BT
pbg4eZ8EyoUBtjV+e2Sm83H9iz6sfVBFE6MMcm5Pn31ePHCOukkSFr/YRYrYWCe2eKyA1c1TavOO
ii3ZkL7NOx6c7v8BwjeDak71NQtCxLl9/8PD30a7ubJEVIyggR0aaGd3415zENZ2wRrVw5yYAEKX
KDs1ZqmU/ZqP/W8wnM46OVirt9BLpCoWv3Bq0mCHJH3Y6PHxSKDTy9sivK8w+5q9Xe1WDDPUc1Wo
PL0JzMaGNkhQcvRS5XXlK5kTP3PnjbD785e/HAWN2H/5i3ebv6l9QCE5dytKlJ+RBEvjwKAHC/99
3wIED8ughwwHJVK4oZ8xKiM5e/ocVZDaEY05xdviRNnfrGC3zZOXYpb9+FA5k0DRY+cGme87WSkW
yH00wtXhd4aQnwYcePWPf5aG/ySjTP5otZ/5oNpY6F15CAhZ2Qs8+fr3IbE80+nE2hYaG/Gm6fbC
XSq5gBJLQR5cgzxIPMxoqXE=
`pragma protect end_protected
File diff suppressed because it is too large Load Diff
+305
View File
@@ -0,0 +1,305 @@
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//ENhttp://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
<html>
<head>
<title>Power Analysis Report</title>
<style type="text/css">
body { font-family: Verdana, Arial, sans-serif; font-size: 12px; }
div#main_wrapper { width: 100%; }
div#content { margin-left: 350px; margin-right: 30px; }
div#catalog_wrapper {position: fixed; top: 30px; width: 350px; float: left; }
div#catalog ul { list-style-type: none; }
div#catalog li { text-align: left; list-style-type:circle; color: #0084ff; margin-top: 3px; margin-bottom: 3px; }
div#catalog a { display:inline-block; text-decoration: none; color: #0084ff; font-weight: bold; padding: 3px; }
div#catalog a:visited { color: #0084ff; }
div#catalog a:hover { color: #fff; background: #0084ff; }
hr { margin-top: 30px; margin-bottom: 30px; }
h1, h3 { text-align: center; }
h1 {margin-top: 50px; }
table, th, td {white-space:pre; border: 1px solid #aaa; }
table { border-collapse:collapse; margin-top: 10px; margin-bottom: 20px; width: 100%; }
th, td { padding: 5px 5px 5px 5px; }
th { color: #fff; font-weight: bold; background-color: #0084ff; }
table.summary_table td.label { width: 24%; min-width: 200px; background-color: #dee8f4; }
table.thermal_table td.label { width: 24%; min-width: 200px; background-color: #dee8f4; }
table.Configure_table td.label { width: 24%; min-width: 200px; background-color: #dee8f4; }
table.detail_table th.label { min-width: 8%; width: 8%; }
</style>
</head>
<body>
<div id="main_wrapper">
<div id="catalog_wrapper">
<div id="catalog">
<ul>
<li><a href="#Message" style=" font-size: 16px;">Power Messages</a>
<ul>
<li><a href="#Configure_Info" style=" font-size: 14px;">Configure Information</a></li>
</ul>
</li>
<li><a href="#Summary" style=" font-size: 16px;">Power Summary</a>
<ul>
<li><a href="#Power_Info" style=" font-size: 14px;">Power Information</a></li>
<li><a href="#Thermal_Info" style=" font-size: 14px;">Thermal Information</a></li>
<li><a href="#Supply_Summary" style=" font-size: 14px;">Supply Information</a></li>
</ul>
</li>
<li><a href="#Detail" style=" font-size: 16px;">Power Details</a>
<ul>
<li><a href="#By_Block_Type" style=" font-size: 14px;">Power By Block Type</a></li>
<li><a href="#By_Hierarchy" style=" font-size: 14px;">Power By Hierarchy</a></li>
<li><a href="#By_Clock_Domain" style=" font-size: 14px;">Power By Clock Domain</a></li>
</ul>
</li>
</ul>
</div><!-- catalog -->
</div><!-- catalog_wrapper -->
<div id="content">
<h1><a name="Message">Power Messages</a></h1>
<table class="summary_table">
<tr>
<td class="label">Report Title</td>
<td>Power Analysis Report</td>
</tr>
<tr>
<td class="label">Design File</td>
<td>/work/impl/gwsynthesis/build.vg</td>
</tr>
<tr>
<td class="label">Physical Constraints File</td>
<td>/work/pins.cst</td>
</tr>
<tr>
<td class="label">Timing Constraints File</td>
<td>/work/test.sdc</td>
</tr>
<tr>
<td class="label">Tool Version</td>
<td>V1.9.11.03 Education</td>
</tr>
<tr>
<td class="label">Part Number</td>
<td>GW5AST-LV138PG484AC1/I0</td>
</tr>
<tr>
<td class="label">Device</td>
<td>GW5AST-138</td>
</tr>
<tr>
<td class="label">Device Version</td>
<td>C</td>
</tr>
<tr>
<td class="label">Created Time</td>
<td>Thu Jun 18 20:00:32 2026
</td>
</tr>
<tr>
<td class="label">Legal Announcement</td>
<td>Copyright (C)2014-2025 Gowin Semiconductor Corporation. All rights reserved.</td>
</tr>
</table>
<h2><a name="Configure_Info">Configure Information:</a></h2>
<table class="summary_table">
<tr>
<td class="label">Grade</td>
<td>Commercial</td>
</tr>
<tr>
<td class="label">Process</td>
<td>Typical</td>
</tr>
<tr>
<td class="label">Ambient Temperature</td>
<td>25.000
</tr>
<tr>
<td class="label">Use Custom Theta JA</td>
<td>false</td>
</tr>
<tr>
<td class="label">Heat Sink</td>
<td>None</td>
</tr>
<tr>
<td class="label">Air Flow</td>
<td>LFM_0</td>
</tr>
<tr>
<td class="label">Use Custom Theta SA</td>
<td>false</td>
</tr>
<tr>
<td class="label">Board Thermal Model</td>
<td>None</td>
</tr>
<tr>
<td class="label">Use Custom Theta JB</td>
<td>false</td>
</tr>
<tr>
<td class="label">Related Vcd File</td>
<td></td>
</tr>
<tr>
<td class="label">Related Saif File</td>
<td></td>
</tr>
<tr>
<td class="label">Filter Glitches</td>
<td>false</td>
</tr>
<tr>
<td class="label">Default IO Toggle Rate</td>
<td>0.125</td>
</tr>
<tr>
<td class="label">Default Remain Toggle Rate</td>
<td>0.125</td>
</tr>
</table>
<h1><a name="Summary">Power Summary</a></h1>
<h2><a name="Power_Info">Power Information:</a></h2>
<table class="summary_table">
<tr>
<td class="label">Total Power (mW)</td>
<td>104.823</td>
</tr>
<tr>
<td class="label">Quiescent Power (mW)</td>
<td>100.835</td>
</tr>
<tr>
<td class="label">Dynamic Power (mW)</td>
<td>3.988</td>
</tr>
</table>
<h2><a name="Thermal_Info">Thermal Information:</a></h2>
<table class="summary_table">
<tr>
<td class="label">Junction Temperature</td>
<td>26.798</td>
</tr>
<tr>
<td class="label">Theta JA</td>
<td>17.153</td>
</tr>
<tr>
<td class="label">Max Allowed Ambient Temperature</td>
<td>83.202</td>
</tr>
</table>
<h2><a name="Supply_Summary">Supply Information:</a></h2>
<table class="summary_table">
<tr>
<th class="label">Voltage Source</th>
<th class="label">Voltage</th>
<th class="label">Dynamic Current(mA)</th>
<th class="label">Quiescent Current(mA)</th>
<th class="label">Power(mW)</th>
</tr>
<tr>
<td>VCC</td>
<td>0.900</td>
<td>4.148</td>
<td>80.012</td>
<td>75.744</td>
</tr>
<tr>
<td>VCCX</td>
<td>1.800</td>
<td>0.049</td>
<td>7.200</td>
<td>13.049</td>
</tr>
<tr>
<td>VCCIO33</td>
<td>3.300</td>
<td>0.050</td>
<td>3.062</td>
<td>10.270</td>
</tr>
<tr>
<td>VCCLDO</td>
<td>1.200</td>
<td>0.000</td>
<td>4.800</td>
<td>5.760</td>
</tr>
</table>
<h1><a name="Detail">Power Details</a></h1>
<h2><a name="By_Block_Type">Power By Block Type:</a></h2>
<table class="detail_table">
<tr>
<th class="label">Block Type</th>
<th class="label">Total Power(mW)</th>
<th class="label">Static Power(mW)</th>
<th class="label">Average Toggle Rate(millions of transitions/sec)</th>
</tr>
<tr>
<td>Logic</td>
<td>0.024</td>
<td>NA</td>
<td>1.885</td>
</tr>
<tr>
<td>IO</td>
<td>11.490
<td>11.191
<td>3.038
</tr>
<tr>
<td>PLL</td>
<td>3.664
<td>NA</td>
<td>NA</td>
</tr>
</table>
<h2><a name="By_Hierarchy">Power By Hierarchy:</a></h2>
<table class="detail_table">
<tr>
<th class="label">Hierarchy Entity</th>
<th class="label">Total Power(mW)</th>
<th class="label">Block Dynamic Power(mW)</th>
</tr>
<tr>
<td>main</td>
<td>3.688</td>
<td>3.688(3.686)</td>
<tr>
<td>main/pll_0/</td>
<td>3.678</td>
<td>3.678(3.678)</td>
<tr>
<td>main/pll_0/u_pll/</td>
<td>3.664</td>
<td>3.664(0.000)</td>
<tr>
<td>main/pll_0/u_pll_init/</td>
<td>0.014</td>
<td>0.014(0.000)</td>
<tr>
<td>main/wrapping_add_0/</td>
<td>0.008</td>
<td>0.008(0.000)</td>
</table>
<h2><a name="By_Clock_Domain">Power By Clock Domain:</a></h2>
<table class="detail_table">
<tr>
<th class="label">Clock Domain</th>
<th class="label">Clock Frequency(Mhz)</th>
<th class="label">Total Dynamic Power(mW)</th>
</tr>
<tr>
<td>clk</td>
<td>20.000</td>
<td>3.679</td>
</tr>
<tr>
<td>pll_0/u_pll/PLL_inst/CLKOUT0.default_gen_clk</td>
<td>9.677</td>
<td>0.010</td>
</tr>
</table>
</div><!-- content -->
</div><!-- main_wrapper -->
</body>
</html>
+1948107
View File
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
+449
View File
@@ -0,0 +1,449 @@
//Copyright (C)2014-2025 Gowin Semiconductor Corporation.
//All rights reserved.
1. PnR Messages
<Report Title>: PnR Report
<Design File>: /work/impl/gwsynthesis/build.vg
<Physical Constraints File>: /work/pins.cst
<Timing Constraints File>: /work/test.sdc
<Tool Version>: V1.9.11.03 Education
<Part Number>: GW5AST-LV138PG484AC1/I0
<Device>: GW5AST-138
<Device Version>: C
<Created Time>:Thu Jun 18 20:00:32 2026
2. PnR Details
Running placement:
Placement Phase 0: CPU time = 0h 0m 0.007s, Elapsed time = 0h 0m 0.007s
Placement Phase 1: CPU time = 0h 0m 0.01s, Elapsed time = 0h 0m 0.014s
Placement Phase 2: CPU time = 0h 0m 0.003s, Elapsed time = 0h 0m 0.003s
Placement Phase 3: CPU time = 0h 0m 0.406s, Elapsed time = 0h 0m 0.407s
Total Placement: CPU time = 0h 0m 0.426s, Elapsed time = 0h 0m 0.431s
Running routing:
Routing Phase 0: CPU time = 0h 0m 0.655s, Elapsed time = 0h 0m 0.657s
Routing Phase 1: CPU time = 0h 0m 2s, Elapsed time = 0h 0m 2s
Routing Phase 2: CPU time = 0h 0m 0.095s, Elapsed time = 0h 0m 0.096s
Routing Phase 3: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0s
Total Routing: CPU time = 0h 0m 3s, Elapsed time = 0h 0m 3s
Generate output files:
CPU time = 0h 0m 6s, Elapsed time = 0h 0m 6s
Total Time and Memory Usage: CPU time = 0h 0m 9s, Elapsed time = 0h 0m 9s, Peak memory usage = 1228MB
3. Resource Usage Summary
--------------------------------------------------------------------------------
Resources | Usage | Utilization
--------------------------------------------------------------------------------
Logic | 120/138240 | <1%
--LUT,ALU,ROM16 | 120(73 LUT, 47 ALU, 0 ROM16) | -
--SSRAM(RAM16) | 0 | -
Register | 72/139095 | <1%
--Logic Register as Latch | 0/138240 | 0%
--Logic Register as FF | 72/138240 | <1%
--I/O Register as Latch | 0/855 | 0%
--I/O Register as FF | 0/855 | 0%
CLS | 71/69120 | <1%
I/O Port | 9/297 | 4%
I/O Buf | 9 | -
--Input Buf | 1 | -
--Output Buf | 8 | -
--Inout Buf | 0 | -
================================================================================
4. I/O Bank Usage Summary
--------------------------------------
I/O Bank | Usage | Utilization
--------------------------------------
bank 2 | 0/50 | 0%
bank 3 | 4/50 | 8%
bank 4 | 5/50 | 10%
bank 5 | 0/35 | 0%
bank 6 | 0/50 | 0%
bank 7 | 0/50 | 0%
bank 10 | 0/12 | 0%
======================================
5. Clock Resource Usage Summary
------------------------------------------
Clock Resource| Usage | Utilization
------------------------------------------
PRIMARY | 2/8 | 25%
LW | 0/8 | 0%
GCLK_PIN | 0/24 | 0%
PLL | 1/12 | 9%
==========================================
6. Global Clock Signals
-------------------------------------------
Signal | Global Clock | Location
-------------------------------------------
clk_d | PRIMARY | PBR2 PBR3
tmds_clk_d | PRIMARY | PBR2 PBR3
===========================================
7. Pinout by Port Name
------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
Port Name | Diff Pair | Loc./Bank | Constraint | Dir. | Site | CFG | IO Type | Drive | Pull Mode | PCI Clamp | Hysteresis | Open Drain | Vref | Single Resistor | Diff Resistor | BankVccio | Pull Strength | Ctle
------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
clk | - | V22/4 | Y | in | IOB104[B] | EMCCLK | LVCMOS33 | OFF | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
leds[0] | - | T18/4 | Y | out | IOB138[B] | D23 | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
leds[1] | - | R18/4 | Y | out | IOB138[A] | D24 | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
leds[2] | - | R17/4 | Y | out | IOB144[B] | D16 | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
leds[3] | - | P16/4 | Y | out | IOB144[A] | D17 | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
tmds_clk | - | G15/3 | Y | out | IOR105[A] | - | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
tmds[0] | - | J14/3 | Y | out | IOR103[A] | - | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
tmds[1] | - | J15/3 | Y | out | IOR101[A] | - | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
tmds[2] | - | K17/3 | Y | out | IOR58[A] | - | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
==================================================================================================================================================================================================================
8. All Package Pins
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
Loc./Bank| Signal | Dir. | Site | CFG | IO Type | Drive | Pull Mode | PCI Clamp | Hysteresis | Open Drain | Vref | Single Resistor | Diff Resistor | Bank Vccio | Pull Strength | Ctle
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
AB11/5 | - | in | IOB51[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB12/5 | - | in | IOB51[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA9/5 | - | in | IOB53[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB10/5 | - | in | IOB53[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA10/5 | - | in | IOB56[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA11/5 | - | in | IOB56[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V10/5 | - | in | IOB58[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W10/5 | - | in | IOB58[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y11/5 | - | in | IOB60[A] | SGCLKT_6/BPLL0_T_IN0/BPLL1_T_IN0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y12/5 | - | in | IOB60[B] | SGCLKC_6/BPLL0_C_IN0/BPLL1_C_IN0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W11/5 | - | in | IOB62[A] | MGCLKT_6/BPLL0_T_IN1/BPLL1_T_IN1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W12/5 | - | in | IOB62[B] | MGCLKC_6/BPLL0_C_IN1/BPLL1_C_IN1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V13/5 | - | in | IOB66[A] | MGCLKT_7/BPLL0_T_FB0/BPLL1_T_FB0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V14/5 | - | in | IOB66[B] | MGCLKC_7/BPLL0_C_FB0/BPLL1_C_FB0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U15/5 | - | in | IOB68[A] | SGCLKT_7/BPLL0_T_FB1/BPLL1_T_FB1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V15/5 | - | in | IOB68[B] | SGCLKC_7/BPLL0_C_FB1/BPLL1_C_FB1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
T14/5 | - | in | IOB70[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
T15/5 | - | in | IOB70[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W15/5 | - | in | IOB72[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W16/5 | - | in | IOB72[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
T16/5 | - | in | IOB76[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U16/5 | - | in | IOB76[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y16/5 | - | in | IOB78[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA16/5 | - | in | IOB78[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB16/5 | - | in | IOB80[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB17/5 | - | in | IOB80[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA15/5 | - | in | IOB83[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB15/5 | - | in | IOB83[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W14/5 | - | in | IOB85[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y14/5 | - | in | IOB85[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y13/5 | - | in | IOB87[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA14/5 | - | in | IOB87[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA13/5 | - | in | IOB89[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB13/5 | - | in | IOB89[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y17/5 | - | in | IOB91[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
P20/4 | - | in | IOB92[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
P22/4 | - | in | IOB93[A] | D00/MOSI | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
R22/4 | - | in | IOB93[B] | D01/DIN | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
P21/4 | - | in | IOB95[A] | D02 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
R21/4 | - | in | IOB95[B] | D03 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
T21/4 | - | in | IOB97[A] | D04 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U21/4 | - | in | IOB97[B] | D05/SI | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
P19/4 | - | in | IOB99[A] | D06/SSPI_CLK | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
R19/4 | - | in | IOB99[B] | D07/SSPI_WPN | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
T19/4 | - | in | IOB102[A] | MCS_N | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
T20/4 | - | in | IOB102[B] | D08/SO | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U22/4 | - | in | IOB104[A] | PUDC_B | LVCMOS33 | 8 | DOWN | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V22/4 | clk | in | IOB104[B] | EMCCLK | LVCMOS33 | OFF | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V17/4 | - | in | IOB106[A] | CSI_B | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W17/4 | - | in | IOB106[B] | D31 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA18/4 | - | in | IOB108[A] | D30 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB18/4 | - | in | IOB108[B] | D29 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA19/4 | - | in | IOB110[A] | RDWR | LVCMOS33 | 8 | DOWN | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB20/4 | - | out | IOB110[B] | DOUT_CSO_B | LVCMOS33 | 8 | UP | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U17/4 | - | in | IOB112[A] | D28 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U18/4 | - | in | IOB112[B] | D27 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V18/4 | - | in | IOB114[A] | SGCLKT_4/BPLL2_T_FB1/BPLL3_T_FB1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V19/4 | - | in | IOB114[B] | SGCLKC_4/BPLL2_C_FB1/BPLL3_C_FB1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y18/4 | - | in | IOB116[A] | MGCLKT_4/BPLL2_T_FB0/BPLL3_T_FB0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y19/4 | - | in | IOB116[B] | MGCLKC_4/BPLL2_C_FB0/BPLL3_C_FB0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U20/4 | - | in | IOB120[A] | SGCLKT_5/BPLL2_T_IN0/BPLL3_T_IN0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V20/4 | - | in | IOB120[B] | SGCLKC_5/BPLL2_C_IN0/BPLL3_C_IN0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W19/4 | - | in | IOB122[A] | MGCLKT_5/BPLL2_T_IN1/BPLL3_T_IN1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W20/4 | - | in | IOB122[B] | MGCLKC_5/BPLL2_C_IN1/BPLL3_C_IN1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W21/4 | - | in | IOB124[A] | D09 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W22/4 | - | in | IOB124[B] | D10 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA20/4 | - | in | IOB126[A] | D11 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA21/4 | - | in | IOB126[B] | D12 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB21/4 | - | in | IOB129[A] | D14 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB22/4 | - | in | IOB129[B] | D15 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y21/4 | - | in | IOB131[A] | SSPI_CS_N | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y22/4 | - | in | IOB131[B] | D13 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
P14/4 | - | in | IOB133[A] | D26 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
R14/4 | - | in | IOB133[B] | D25 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
N17/4 | - | in | IOB135[A] | CLKHOLD_N | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
P17/4 | - | in | IOB135[B] | D22 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
R18/4 | leds[1] | out | IOB138[A] | D24 | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
T18/4 | leds[0] | out | IOB138[B] | D23 | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
P15/4 | - | in | IOB140[A] | D21 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
R16/4 | - | in | IOB140[B] | D20 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
N13/4 | - | in | IOB142[A] | D19 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
N14/4 | - | in | IOB142[B] | D18 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
P16/4 | leds[3] | out | IOB144[A] | D17 | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
R17/4 | leds[2] | out | IOB144[B] | D16 | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
N15/4 | - | in | IOB146[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U13/10 | - | out | IOB169[A] | TDO | LVCMOS33 | 8 | UP | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
T13/10 | - | in | IOB169[B] | TMS | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U12/10 | - | in | IOB171[A] | READY | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
G11/10 | - | in | IOB171[B] | DONE | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V12/10 | - | in | IOB173[A] | TCK | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
R13/10 | - | in | IOB173[B] | TDI | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U11/10 | - | in | IOB175[A] | MODE0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
L12/10 | - | in | IOB175[B] | CCLK | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U10/10 | - | in | IOB177[A] | MODE1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U9/10 | - | in | IOB177[B] | MODE2 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U8/10 | - | in | IOB179[A] | CFGBVS | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
N12/10 | - | in | IOB179[B] | RECONFIG_N | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
F4/7 | - | in | IOL1[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
B1/7 | - | in | IOL2[A] | ADCINCK0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
A1/7 | - | in | IOL2[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
E1/7 | - | in | IOL4[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
D1/7 | - | in | IOL4[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
C2/7 | - | in | IOL6[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
B2/7 | - | in | IOL6[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
E2/7 | - | in | IOL8[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
D2/7 | - | in | IOL8[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
G1/7 | - | in | IOL11[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
F1/7 | - | in | IOL11[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
F3/7 | - | in | IOL13[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
E3/7 | - | in | IOL13[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
K1/7 | - | in | IOL15[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
J1/7 | - | in | IOL15[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
H2/7 | - | in | IOL17[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
G2/7 | - | in | IOL17[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
J5/7 | - | in | IOL20[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
H5/7 | - | in | IOL20[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
K2/7 | - | in | IOL22[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
J2/7 | - | in | IOL22[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
H4/7 | - | in | IOL24[A] | MGCLKT_11/LPLL0_T_IN1/LPLL1_T_IN1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
G4/7 | - | in | IOL24[B] | MGCLKC_11/LPLL0_C_IN1/LPLL1_C_IN1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
H3/7 | - | in | IOL26[A] | SGCLKT_11/LPLL0_T_IN0/LPLL1_T_IN0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
G3/7 | - | in | IOL26[B] | SGCLKC_11/LPLL0_C_IN0/LPLL1_C_IN0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
K4/7 | - | in | IOL29[A] | MGCLKT_10/LPLL0_T_FB1/LPLL1_T_FB1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
J4/7 | - | in | IOL29[B] | MGCLKC_10/LPLL0_C_FB1/LPLL1_C_FB1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
L3/7 | - | in | IOL31[A] | SGCLKT_10/LPLL0_T_FB0/LPLL1_T_FB0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
K3/7 | - | in | IOL31[B] | SGCLKC_10/LPLL0_C_FB0/LPLL1_C_FB0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
M3/7 | - | in | IOL33[A] | FBTEST_L0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
M2/7 | - | in | IOL33[B] | CLKTEST_L0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
M1/7 | - | in | IOL35[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
L1/7 | - | in | IOL35[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
K6/7 | - | in | IOL38[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
J6/7 | - | in | IOL38[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
L5/7 | - | in | IOL40[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
L4/7 | - | in | IOL40[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
N4/7 | - | in | IOL42[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
N3/7 | - | in | IOL42[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
R1/7 | - | in | IOL44[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
P1/7 | - | in | IOL44[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
P2/7 | - | in | IOL47[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
N2/7 | - | in | IOL47[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
P5/7 | - | in | IOL49[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
P4/7 | - | in | IOL49[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
M6/7 | - | in | IOL51[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
M5/7 | - | in | IOL51[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
P6/7 | - | in | IOL53[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
N5/7 | - | in | IOL53[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
L6/7 | - | in | IOL55[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
T1/6 | - | in | IOL56[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U1/6 | - | in | IOL56[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U2/6 | - | in | IOL58[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V2/6 | - | in | IOL58[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U3/6 | - | in | IOL60[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V3/6 | - | in | IOL60[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W2/6 | - | in | IOL62[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y2/6 | - | in | IOL62[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
R3/6 | - | in | IOL65[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
R2/6 | - | in | IOL65[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W1/6 | - | in | IOL67[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y1/6 | - | in | IOL67[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y3/6 | - | in | IOL69[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA3/6 | - | in | IOL69[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA1/6 | - | in | IOL71[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB1/6 | - | in | IOL71[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
T3/6 | - | in | IOL73[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB3/6 | - | in | IOL74[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB2/6 | - | in | IOL74[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA5/6 | - | in | IOL76[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB5/6 | - | in | IOL76[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y4/6 | - | in | IOL78[A] | SGCLKT_8/LPLL2_T_IN0/LPLL3_T_IN0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA4/6 | - | in | IOL78[B] | SGCLKC_8/LPLL2_C_IN0/LPLL3_C_IN0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V4/6 | - | in | IOL80[A] | MGCLKT_8/LPLL2_T_IN1/LPLL3_T_IN1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W4/6 | - | in | IOL80[B] | MGCLKC_8/LPLL2_C_IN1/LPLL3_C_IN1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
R4/6 | - | in | IOL83[A] | MGCLKT_9/LPLL2_T_FB1/LPLL3_T_FB1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
T4/6 | - | in | IOL83[B] | MGCLKC_9/LPLL2_C_FB1/LPLL3_C_FB1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
T5/6 | - | in | IOL85[A] | SGCLKT_9/LPLL2_T_FB0/LPLL3_T_FB0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U5/6 | - | in | IOL85[B] | SGCLKC_9/LPLL2_C_FB0/LPLL3_C_FB0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U6/6 | - | in | IOL87[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V5/6 | - | in | IOL87[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
R6/6 | - | in | IOL89[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
T6/6 | - | in | IOL89[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y6/6 | - | in | IOL92[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA6/6 | - | in | IOL92[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W6/6 | - | in | IOL94[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W5/6 | - | in | IOL94[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V9/6 | - | in | IOL96[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V8/6 | - | in | IOL96[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB7/6 | - | in | IOL98[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB6/6 | - | in | IOL98[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA8/6 | - | in | IOL101[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB8/6 | - | in | IOL101[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y8/6 | - | in | IOL103[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y7/6 | - | in | IOL103[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W9/6 | - | in | IOL105[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y9/6 | - | in | IOL105[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V7/6 | - | in | IOL107[A] | MCKTEST | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W7/6 | - | in | IOL107[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U7/6 | - | in | IOL109[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
F15/2 | - | in | IOR1[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
E13/2 | - | in | IOR2[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
E14/2 | - | in | IOR2[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
D14/2 | - | in | IOR4[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
D15/2 | - | in | IOR4[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
E16/2 | - | in | IOR6[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
D16/2 | - | in | IOR6[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
C14/2 | - | in | IOR8[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
C15/2 | - | in | IOR8[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
F13/2 | - | in | IOR11[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
F14/2 | - | in | IOR11[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
F16/2 | - | in | IOR13[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
E17/2 | - | in | IOR13[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
A13/2 | - | in | IOR15[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
A14/2 | - | in | IOR15[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
C13/2 | - | in | IOR17[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
B13/2 | - | in | IOR17[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
A15/2 | - | in | IOR20[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
A16/2 | - | in | IOR20[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
B15/2 | - | in | IOR22[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
B16/2 | - | in | IOR22[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
B17/2 | - | in | IOR24[A] | SGCLKT_1/RPLL0_T_FB0/RPLL1_T_FB0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
B18/2 | - | in | IOR24[B] | SGCLKC_1/RPLL0_C_FB0/RPLL1_C_FB0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
D17/2 | - | in | IOR26[A] | MGCLKT_1/RPLL0_T_FB1/RPLL1_T_FB1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
C17/2 | - | in | IOR26[B] | MGCLKC_1/RPLL0_C_FB1/RPLL1_C_FB1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
E19/2 | - | in | IOR29[A] | SGCLKT_0/RPLL0_T_IN0/RPLL1_T_IN0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
D19/2 | - | in | IOR29[B] | SGCLKC_0/RPLL0_C_IN0/RPLL1_C_IN0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
C18/2 | - | in | IOR31[A] | MGCLKT_0/RPLL0_T_IN1/RPLL1_T_IN1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
C19/2 | - | in | IOR31[B] | MGCLKC_0/RPLL0_C_IN1/RPLL1_C_IN1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
F19/2 | - | in | IOR33[A] | FBTEST_R0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
F20/2 | - | in | IOR33[B] | CLKTEST_R0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
F18/2 | - | in | IOR35[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
E18/2 | - | in | IOR35[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
A18/2 | - | in | IOR38[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
A19/2 | - | in | IOR38[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
B20/2 | - | in | IOR40[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
A20/2 | - | in | IOR40[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
C22/2 | - | in | IOR42[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
B22/2 | - | in | IOR42[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
B21/2 | - | in | IOR44[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
A21/2 | - | in | IOR44[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
D20/2 | - | in | IOR47[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
C20/2 | - | in | IOR47[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
E22/2 | - | in | IOR49[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
D22/2 | - | in | IOR49[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
E21/2 | - | in | IOR51[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
D21/2 | - | in | IOR51[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
G21/2 | - | in | IOR53[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
G22/2 | - | in | IOR53[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
F21/2 | - | in | IOR55[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
M13/3 | - | in | IOR56[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
L13/3 | - | in | IOR56[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
K17/3 | tmds[2] | out | IOR58[A] | - | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
J17/3 | - | in | IOR58[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
K13/3 | - | in | IOR60[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
K14/3 | - | in | IOR60[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
L14/3 | - | in | IOR62[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
L15/3 | - | in | IOR62[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
L16/3 | - | in | IOR65[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
K16/3 | - | in | IOR65[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
M15/3 | - | in | IOR67[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
M16/3 | - | in | IOR67[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
H20/3 | - | in | IOR69[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
G20/3 | - | in | IOR69[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
M21/3 | - | in | IOR71[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
L21/3 | - | in | IOR71[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
M17/3 | - | in | IOR73[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
J22/3 | - | in | IOR74[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
H22/3 | - | in | IOR74[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
K21/3 | - | in | IOR76[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
K22/3 | - | in | IOR76[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
J20/3 | - | in | IOR78[A] | SGCLKT_3/RPLL2_T_FB0/RPLL3_T_FB0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
J21/3 | - | in | IOR78[B] | SGCLKC_3/RPLL2_C_FB0/RPLL3_C_FB0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
J19/3 | - | in | IOR80[A] | MGCLKT_3/RPLL2_T_FB1/RPLL3_T_FB1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
H19/3 | - | in | IOR80[B] | MGCLKC_3/RPLL2_C_FB1/RPLL3_C_FB1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
K18/3 | - | in | IOR83[A] | MGCLKT_2/RPLL2_T_IN1/RPLL3_T_IN1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
K19/3 | - | in | IOR83[B] | MGCLKC_2/RPLL2_C_IN1/RPLL3_C_IN1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
L19/3 | - | in | IOR85[A] | SGCLKT_2/RPLL2_T_IN0/RPLL3_T_IN0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
L20/3 | - | in | IOR85[B] | SGCLKC_2/RPLL2_C_IN0/RPLL3_C_IN0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
M18/3 | - | in | IOR87[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
L18/3 | - | in | IOR87[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
N22/3 | - | in | IOR89[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
M22/3 | - | in | IOR89[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
N18/3 | - | in | IOR92[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
N19/3 | - | in | IOR92[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
N20/3 | - | in | IOR94[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
M20/3 | - | in | IOR94[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
H17/3 | - | in | IOR96[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
H18/3 | - | in | IOR96[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
H13/3 | - | in | IOR98[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
G13/3 | - | in | IOR98[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
J15/3 | tmds[1] | out | IOR101[A] | - | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
H15/3 | - | in | IOR101[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
J14/3 | tmds[0] | out | IOR103[A] | - | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
H14/3 | - | in | IOR103[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
G15/3 | tmds_clk | out | IOR105[A] | - | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
G16/3 | - | in | IOR105[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
G17/3 | - | in | IOR107[A] | ADCINCK1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
G18/3 | - | in | IOR107[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
J16/3 | - | in | IOR109[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
N9/ADC | - | in | ADCTN | - | - | - | - | - | - | - | - | - | - | - | - | -
N10/ADC | - | in | ADCTP | - | - | - | - | - | - | - | - | - | - | - | - | -
M9/ADC | - | in | ADCVN | - | - | - | - | - | - | - | - | - | - | - | - | -
L10/ADC | - | in | ADCVP | - | - | - | - | - | - | - | - | - | - | - | - | -
A8/Q0 | - | in | Q0_LN0_RXM_I | - | - | - | - | - | - | - | - | - | - | - | - | -
B8/Q0 | - | in | Q0_LN0_RXP_I | - | - | - | - | - | - | - | - | - | - | - | - | -
A4/Q0 | - | out | Q0_LN0_TXM_O | - | - | - | - | - | - | - | - | - | - | - | - | -
B4/Q0 | - | out | Q0_LN0_TXP_O | - | - | - | - | - | - | - | - | - | - | - | - | -
C9/Q0 | - | in | Q0_LN1_RXM_I | - | - | - | - | - | - | - | - | - | - | - | - | -
D9/Q0 | - | in | Q0_LN1_RXP_I | - | - | - | - | - | - | - | - | - | - | - | - | -
C7/Q0 | - | out | Q0_LN1_TXM_O | - | - | - | - | - | - | - | - | - | - | - | - | -
D7/Q0 | - | out | Q0_LN1_TXP_O | - | - | - | - | - | - | - | - | - | - | - | - | -
A10/Q0 | - | in | Q0_LN2_RXM_I | - | - | - | - | - | - | - | - | - | - | - | - | -
B10/Q0 | - | in | Q0_LN2_RXP_I | - | - | - | - | - | - | - | - | - | - | - | - | -
A6/Q0 | - | out | Q0_LN2_TXM_O | - | - | - | - | - | - | - | - | - | - | - | - | -
B6/Q0 | - | out | Q0_LN2_TXP_O | - | - | - | - | - | - | - | - | - | - | - | - | -
C11/Q0 | - | in | Q0_LN3_RXM_I | - | - | - | - | - | - | - | - | - | - | - | - | -
D11/Q0 | - | in | Q0_LN3_RXP_I | - | - | - | - | - | - | - | - | - | - | - | - | -
C5/Q0 | - | out | Q0_LN3_TXM_O | - | - | - | - | - | - | - | - | - | - | - | - | -
D5/Q0 | - | out | Q0_LN3_TXP_O | - | - | - | - | - | - | - | - | - | - | - | - | -
E6/Q0 | - | in | Q0_REFCLKM_0 | - | - | - | - | - | - | - | - | - | - | - | - | -
E10/Q0 | - | in | Q0_REFCLKM_1 | - | - | - | - | - | - | - | - | - | - | - | - | -
F6/Q0 | - | in | Q0_REFCLKP_0 | - | - | - | - | - | - | - | - | - | - | - | - | -
F10/Q0 | - | in | Q0_REFCLKP_1 | - | - | - | - | - | - | - | - | - | - | - | - | -
======================================================================================================================================================================================
+824
View File
@@ -0,0 +1,824 @@
=====
SETUP
46.472
9.450
55.922
clk_ibuf
0.000
0.683
pll_0/u_pll_init/locksig_4_s0
5.979
6.361
pll_0/u_pll_init/n525_s16
7.523
8.090
pll_0/u_pll_init/n525_s14
8.301
8.869
pll_0/u_pll_init/n525_s12
8.871
9.450
pll_0/u_pll_init/RomAddr_1_s1
9.450
=====
SETUP
46.625
9.297
55.922
clk_ibuf
0.000
0.683
pll_0/u_pll_init/locksig_4_s0
5.979
6.361
pll_0/u_pll_init/n521_s17
7.371
7.939
pll_0/u_pll_init/n521_s15
8.111
8.568
pll_0/u_pll_init/n521_s12
8.719
9.297
pll_0/u_pll_init/RomAddr_3_s1
9.297
=====
SETUP
46.730
9.194
55.924
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_2_s0
5.988
6.356
pll_0/u_pll_init/RomAddr_3_s4
7.041
7.497
pll_0/u_pll_init/n523_s16
7.886
8.464
pll_0/u_pll_init/n523_s12
8.616
9.194
pll_0/u_pll_init/RomAddr_2_s1
9.194
=====
SETUP
46.770
9.161
55.932
clk_ibuf
0.000
0.683
pll_0/u_pll_init/locksig_4_s0
5.979
6.361
pll_0/u_pll_init/n527_s16
7.523
8.101
pll_0/u_pll_init/n527_s13
8.104
8.651
pll_0/u_pll_init/n527_s12
8.654
9.161
pll_0/u_pll_init/RomAddr_0_s1
9.161
=====
SETUP
46.969
8.708
55.677
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n504_s2
6.971
7.538
pll_0/u_pll_init/RomAddr_3_s3
7.716
8.283
pll_0/u_pll_init/RomAddr_2_s1
8.708
=====
SETUP
47.056
8.641
55.697
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_2_s0
5.988
6.356
pll_0/u_pll_init/n513_s9
7.443
8.022
pll_0/u_pll_init/n513_s8
8.024
8.283
pll_0/u_pll_init/state_2_s0
8.641
=====
SETUP
47.175
8.499
55.675
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n504_s2
6.971
7.538
pll_0/u_pll_init/RomAddr_3_s3
7.716
8.283
pll_0/u_pll_init/RomAddr_1_s1
8.499
=====
SETUP
47.175
8.499
55.675
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n504_s2
6.971
7.538
pll_0/u_pll_init/RomAddr_3_s3
7.716
8.283
pll_0/u_pll_init/RomAddr_3_s1
8.499
=====
SETUP
47.185
8.499
55.684
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n504_s2
6.971
7.538
pll_0/u_pll_init/RomAddr_3_s3
7.716
8.283
pll_0/u_pll_init/RomAddr_0_s1
8.499
=====
SETUP
47.298
8.377
55.675
clk_ibuf
0.000
0.683
pll_0/u_pll_init/RomAddr_3_s1
5.986
6.368
pll_0/u_pll_init/n987_s1
6.757
7.325
pll_0/u_pll_init/n992_s0
7.718
8.226
pll_0/u_pll_init/locksig_0_s0
8.377
=====
SETUP
47.324
8.649
55.973
clk_ibuf
0.000
0.683
pll_0/u_pll_init/waitcnt_5_s0
6.056
6.438
pll_0/u_pll_init/n541_s5
6.592
7.166
pll_0/u_pll_init/n541_s2
7.168
7.716
pll_0/u_pll_init/n541_s0
8.076
8.649
pll_0/u_pll_init/Waitlock_s0
8.649
=====
SETUP
47.385
8.279
55.664
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n564_s1
6.764
7.332
pll_0/u_pll_init/waitcnt_13_s0
8.279
=====
SETUP
47.385
8.279
55.664
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n564_s1
6.764
7.332
pll_0/u_pll_init/waitcnt_14_s0
8.279
=====
SETUP
47.385
8.279
55.664
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n564_s1
6.764
7.332
pll_0/u_pll_init/waitcnt_15_s0
8.279
=====
SETUP
47.385
8.279
55.664
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n564_s1
6.764
7.332
pll_0/u_pll_init/waitcnt_16_s0
8.279
=====
SETUP
47.394
8.279
55.674
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n564_s1
6.764
7.332
pll_0/u_pll_init/waitcnt_7_s0
8.279
=====
SETUP
47.394
8.279
55.674
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n564_s1
6.764
7.332
pll_0/u_pll_init/waitcnt_8_s0
8.279
=====
SETUP
47.394
8.279
55.674
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n564_s1
6.764
7.332
pll_0/u_pll_init/waitcnt_9_s0
8.279
=====
SETUP
47.394
8.279
55.674
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n564_s1
6.764
7.332
pll_0/u_pll_init/waitcnt_10_s0
8.279
=====
SETUP
47.394
8.279
55.674
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n564_s1
6.764
7.332
pll_0/u_pll_init/waitcnt_11_s0
8.279
=====
SETUP
47.394
8.279
55.674
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n564_s1
6.764
7.332
pll_0/u_pll_init/waitcnt_12_s0
8.279
=====
SETUP
47.452
8.308
55.761
clk_ibuf
0.000
0.683
pll_0/u_pll_init/Waitlock_s0
6.037
6.419
pll_0/u_pll_init/n516_s8
6.857
7.146
pll_0/u_pll_init/n516_s7
7.151
7.718
pll_0/u_pll_init/state_1_s0
8.308
=====
SETUP
47.512
8.248
55.761
clk_ibuf
0.000
0.683
pll_0/u_pll_init/Waitlock_s0
6.037
6.419
pll_0/u_pll_init/n516_s8
6.857
7.146
pll_0/u_pll_init/n519_s7
7.151
7.718
pll_0/u_pll_init/state_0_s0
8.248
=====
SETUP
47.516
8.158
55.675
clk_ibuf
0.000
0.683
pll_0/u_pll_init/RomAddr_3_s1
5.986
6.368
pll_0/u_pll_init/n987_s1
6.757
7.325
pll_0/u_pll_init/n989_s0
7.718
8.007
pll_0/u_pll_init/locksig_3_s0
8.158
=====
SETUP
47.622
8.061
55.683
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n564_s1
6.764
7.332
pll_0/u_pll_init/waitcnt_1_s0
8.061
=====
HOLD
0.275
6.149
5.874
counter_0_s0
5.849
5.990
wrapping_add_0/_e_1752_0_s2
5.996
6.149
counter_0_s0
6.149
=====
HOLD
0.278
3.210
2.932
clk_ibuf
0.000
0.675
pll_0/u_pll_init/waitcnt_0_s0
2.907
3.048
pll_0/u_pll_init/n562_s2
3.057
3.210
pll_0/u_pll_init/waitcnt_0_s0
3.210
=====
HOLD
0.378
3.222
2.844
clk_ibuf
0.000
0.675
pll_0/u_pll_init/enable_r_0_s0
2.889
3.033
pll_0/u_pll_init/enable_r_1_s0
3.222
=====
HOLD
0.380
3.293
2.914
clk_ibuf
0.000
0.675
pll_0/u_pll_init/RomAddr_3_s1
2.893
3.037
pll_0/u_pll_init/n28_s22
3.140
3.293
pll_0/u_pll_init/RomDreg_8_s0
3.293
=====
HOLD
0.380
3.293
2.914
clk_ibuf
0.000
0.675
pll_0/u_pll_init/RomAddr_3_s1
2.893
3.037
pll_0/u_pll_init/n27_s21
3.140
3.293
pll_0/u_pll_init/RomDreg_9_s0
3.293
=====
HOLD
0.389
3.290
2.901
clk_ibuf
0.000
0.675
pll_0/u_pll_init/RomAddr_1_s1
2.893
3.037
pll_0/u_pll_init/n26_s22
3.142
3.290
pll_0/u_pll_init/RomDreg_10_s0
3.290
=====
HOLD
0.394
6.265
5.871
counter_3_s0
5.858
5.999
wrapping_add_0/_e_1752_3_s
6.005
6.265
counter_3_s0
6.265
=====
HOLD
0.394
6.273
5.879
counter_13_s0
5.866
6.007
wrapping_add_0/_e_1752_13_s
6.013
6.273
counter_13_s0
6.273
=====
HOLD
0.394
6.273
5.879
counter_15_s0
5.866
6.007
wrapping_add_0/_e_1752_15_s
6.013
6.273
counter_15_s0
6.273
=====
HOLD
0.394
6.265
5.871
counter_25_s0
5.858
5.999
wrapping_add_0/_e_1752_25_s
6.005
6.265
counter_25_s0
6.265
=====
HOLD
0.394
6.265
5.871
counter_27_s0
5.858
5.999
wrapping_add_0/_e_1752_27_s
6.005
6.265
counter_27_s0
6.265
=====
HOLD
0.394
3.309
2.915
clk_ibuf
0.000
0.675
pll_0/u_pll_init/waitcnt_3_s0
2.902
3.043
pll_0/u_pll_init/n559_s
3.049
3.309
pll_0/u_pll_init/waitcnt_3_s0
3.309
=====
HOLD
0.394
3.306
2.911
clk_ibuf
0.000
0.675
pll_0/u_pll_init/waitcnt_7_s0
2.898
3.039
pll_0/u_pll_init/n555_s
3.046
3.306
pll_0/u_pll_init/waitcnt_7_s0
3.306
=====
HOLD
0.394
3.306
2.911
clk_ibuf
0.000
0.675
pll_0/u_pll_init/waitcnt_9_s0
2.898
3.039
pll_0/u_pll_init/n553_s
3.046
3.306
pll_0/u_pll_init/waitcnt_9_s0
3.306
=====
HOLD
0.394
3.302
2.908
clk_ibuf
0.000
0.675
pll_0/u_pll_init/waitcnt_13_s0
2.895
3.036
pll_0/u_pll_init/n549_s
3.042
3.302
pll_0/u_pll_init/waitcnt_13_s0
3.302
=====
HOLD
0.394
3.302
2.908
clk_ibuf
0.000
0.675
pll_0/u_pll_init/waitcnt_15_s0
2.895
3.036
pll_0/u_pll_init/n547_s
3.042
3.302
pll_0/u_pll_init/waitcnt_15_s0
3.302
=====
HOLD
0.394
6.269
5.875
counter_31_s0
5.862
6.003
wrapping_add_0/_e_1752_31_s
6.009
6.269
counter_31_s0
6.269
=====
HOLD
0.394
6.269
5.875
counter_9_s0
5.862
6.003
wrapping_add_0/_e_1752_9_s
6.009
6.269
counter_9_s0
6.269
=====
HOLD
0.394
6.269
5.875
counter_19_s0
5.862
6.003
wrapping_add_0/_e_1752_19_s
6.009
6.269
counter_19_s0
6.269
=====
HOLD
0.394
6.269
5.875
counter_21_s0
5.862
6.003
wrapping_add_0/_e_1752_21_s
6.009
6.269
counter_21_s0
6.269
=====
HOLD
0.397
6.272
5.875
counter_7_s0
5.862
6.003
wrapping_add_0/_e_1752_7_s
6.012
6.272
counter_7_s0
6.272
=====
HOLD
0.429
3.336
2.908
clk_ibuf
0.000
0.675
pll_0/u_pll_init/waitcnt_11_s0
2.898
3.043
pll_0/u_pll_init/n541_s0
3.138
3.336
pll_0/u_pll_init/Waitlock_s0
3.336
=====
HOLD
0.433
6.316
5.883
counter_1_s0
5.858
5.999
wrapping_add_0/_e_1752_1_s
6.068
6.316
counter_1_s0
6.316
=====
HOLD
0.433
3.360
2.928
clk_ibuf
0.000
0.675
pll_0/u_pll_init/waitcnt_1_s0
2.902
3.043
pll_0/u_pll_init/n561_s
3.112
3.360
pll_0/u_pll_init/waitcnt_1_s0
3.360
=====
HOLD
0.442
3.369
2.928
clk_ibuf
0.000
0.675
pll_0/u_pll_init/waitcnt_3_s0
2.902
3.043
pll_0/u_pll_init/n559_s
3.049
3.244
pll_0/u_pll_init/n558_s
3.244
3.264
pll_0/u_pll_init/n557_s
3.264
3.369
pll_0/u_pll_init/waitcnt_5_s0
3.369
+10
View File
@@ -0,0 +1,10 @@
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
<html>
<head>
<title>Timing Analysis Report</title>
</head>
<frameset cols="20%, 80%">
<frame src="build_tr_cata.html" name="cataFrame" />
<frame src="build_tr_content.html" name="mainFrame"/>
</frameset>
</html>
+132
View File
@@ -0,0 +1,132 @@
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
<html>
<head>
<title>Timing Report Navigation</title>
<style type="text/css">
@import url(../temp/style.css);
body { font-family: Verdana, Arial, sans-serif; font-size: 12px; }
div#catalog_wrapper { width: 100%; }
div#catalog ul { list-style: none; margin-left: -15px; }
div#catalog ul li { margin: 3px 0 3px 0; text-align: left; color: #0084ff; white-space: nowrap; word-break: keep-all; }
div#catalog a { display:inline-block; text-decoration: none; color: #0084ff; font-weight: bold; padding: 4px; margin: 0 0 0 0; }
div#catalog a:visited { color: #0084ff; }
div#catalog a:hover { color: #fff; background: #0084ff; }
div.triangle_fake, div.triangle { display: inline-block; cursor: pointer; width: 8px; height: 0; border-top: 5px solid transparent; border-bottom: 5px solid transparent; }
div.triangle_fake { border-left: 5px solid transparent; }
div.triangle { border-left: 5px solid #0084ff; }
div.triangle:hover { border-left-color: #000; }
</style>
<script>
function onClick(obj){var childs=obj.parentNode.childNodes;for(var i=0;i<childs.length;i++){if(childs[i].tagName=="UL"){if(childs[i].style.display=="none"){childs[i].style.display="block"}else{childs[i].style.display="none"}}}};
</script>
</head>
<body>
<div id="catalog_wrapper">
<div id="catalog">
<ul>
<!-- messages begin-->
<li><div class="triangle_fake"></div><a href="build_tr_content.html#Message" target="mainFrame" style=" font-size: 16px;">Timing Messages</a></li>
<!-- messages end-->
<!-- summaries begin-->
<li><div class="triangle" onclick="onClick(this)"></div><a href="build_tr_content.html#Summary" style=" font-size: 16px;" target="mainFrame">Timing Summaries</a>
<ul>
<li><div class="triangle_fake"></div><a href="build_tr_content.html#STA_Tool_Run_Summary" style=" font-size: 14px;" target="mainFrame">STA Tool Run Summary</a></li>
<li><div class="triangle_fake"></div><a href="build_tr_content.html#Clock_Report" style=" font-size: 14px;" target="mainFrame">Clock Summary</a></li>
<li><div class="triangle_fake"></div><a href="build_tr_content.html#Max_Frequency_Report" style=" font-size: 14px;" target="mainFrame">Max Frequency Summary</a></li>
<li><div class="triangle_fake"></div><a href="build_tr_content.html#Total_Negative_Slack_Report" style=" font-size: 14px;" target="mainFrame">Total Negative Slack Summary</a></li>
</ul>
</li>
<!-- summaries end-->
<!-- details begin-->
<li><div class="triangle" onclick="onClick(this)"></div><a href="build_tr_content.html#Detail" style=" font-size: 16px;" target="mainFrame">Timing Details</a>
<ul>
<!--All_Path_Slack_Table begin-->
<li><div class="triangle" onclick="onClick(this)"></div><a href="build_tr_content.html#All_Path_Slack_Table" style=" font-size: 14px;" target="mainFrame">Path Slacks Table</a>
<ul>
<!--Setup_Slack_Table begin-->
<li><div class="triangle_fake"></div><a href="build_tr_content.html#Setup_Slack_Table" style=" font-size: 13px;" target="mainFrame">Setup Paths Table</a>
</li>
<!--Setup_Slack_Table end-->
<!--Hold_Slack_Table begin-->
<li><div class="triangle_fake"></div><a href="build_tr_content.html#Hold_Slack_Table" style=" font-size: 13px;" target="mainFrame">Hold Paths Table</a>
</li>
<!--Hold_Slack_Table end-->
<!--Recovery_Slack_Table begin-->
<li><div class="triangle_fake"></div><a href="build_tr_content.html#Recovery_Slack_Table" style=" font-size: 13px;" target="mainFrame">Recovery Paths Table</a>
</li>
<!--Recovery_Slack_Table end-->
<!--Removal_Slack_Table begin-->
<li><div class="triangle_fake"></div><a href="build_tr_content.html#Removal_Slack_Table" style=" font-size: 13px;" target="mainFrame">Removal Paths Table</a>
</li>
<!--Removal_Slack_Table end-->
</ul>
</li><!--All_Path_Slack_Table end-->
<!--MIN_PULSE_WIDTH_TABLE begin-->
<li><div class="triangle_fake"></div><a href="build_tr_content.html#MIN_PULSE_WIDTH_TABLE" style=" font-size: 14px;" target="mainFrame">Minimum Pulse Width Table</a>
</li>
<!--MIN_PULSE_WIDTH_TABLE end-->
<!--Timing_Report_by_Analysis_Type begin-->
<li><div class="triangle" onclick="onClick(this)"></div><a href="build_tr_content.html#Timing_Report_by_Analysis_Type" style=" font-size: 14px;" target="mainFrame">Timing Report By Analysis Type</a>
<ul>
<!--Setup_Analysis begin-->
<li><div class="triangle_fake"></div><a href="build_tr_content.html#Setup_Analysis" style=" font-size: 13px;" target="mainFrame">Setup Analysis Report</a>
</li>
<!--Setup_Analysis end-->
<!--Hold_Analysis begin-->
<li><div class="triangle_fake"></div><a href="build_tr_content.html#Hold_Analysis" style=" font-size: 13px;" target="mainFrame">Hold Analysis Report</a>
</li>
<!--Hold_Analysis end-->
<!--Recovery_Analysis begin-->
<li><div class="triangle_fake"></div><a href="build_tr_content.html#Recovery_Analysis" style=" font-size: 13px;" target="mainFrame">Recovery Analysis Report</a>
</li>
<!--Recovery_Analysis end-->
<!--Removal_Analysis begin-->
<li><div class="triangle_fake"></div><a href="build_tr_content.html#Removal_Analysis" style=" font-size: 13px;" target="mainFrame">Removal Analysis Report</a>
</li>
<!--Removal_Analysis end-->
</ul>
</li>
<!--Timing_Report_by_Analysis_Type end-->
<!--Minimum_Pulse_Width_Report begin-->
<li><div class="triangle_fake"></div><a href="build_tr_content.html#Minimum_Pulse_Width_Report" style=" font-size: 14px;" target="mainFrame">Minimum Pulse Width Report</a>
</li>
<!--Minimum_Pulse_Width_Report end-->
<!--High_Fanout_Nets_Report begin-->
<li><div class="triangle_fake"></div><a href="build_tr_content.html#High_Fanout_Nets_Report" style=" font-size: 14px;" target="mainFrame">High Fanout Nets Report</a></li>
<!--High_Fanout_Nets_Report end-->
<!--Route_Congestions_Report begin-->
<li><div class="triangle_fake"></div><a href="build_tr_content.html#Route_Congestions_Report" style=" font-size: 14px;" target="mainFrame">Route Congestions Report</a></li>
<!--Route_Congestions_Report end-->
<!--Timing_Exceptions_Report begin-->
<li><div class="triangle" onclick="onClick(this)"></div><a href="build_tr_content.html#Timing_Exceptions_Report" style=" font-size: 14px;" target="mainFrame">Timing Exceptions Report</a>
<ul>
<!--Setup_Analysis_Exceptions begin-->
<li><div class="triangle_fake"></div><a href="build_tr_content.html#Setup_Analysis_Exceptions" style=" font-size: 13px;" target="mainFrame">Setup Analysis Report</a>
</li>
<!--Setup_Analysis_Exceptions end-->
<!--Hold_Analysis_Exceptions begin-->
<li><div class="triangle_fake"></div><a href="build_tr_content.html#Hold_Analysis_Exceptions" style=" font-size: 13px;" target="mainFrame">Hold Analysis Report</a>
</li>
<!--Hold_Analysis_Exceptions end-->
<!--Recovery_Analysis_Exceptions begin-->
<li><div class="triangle_fake"></div><a href="build_tr_content.html#Recovery_Analysis_Exceptions" style=" font-size: 13px;" target="mainFrame">Recovery Analysis Report</a>
</li>
<!--Recovery_Analysis_Exceptions end-->
<!--Removal_Analysis_Exceptions begin-->
<li><div class="triangle_fake" onclick="onClick(this)"></div><a href="build_tr_content.html#Removal_Analysis_Exceptions" style=" font-size: 13px;" target="mainFrame">Removal Analysis Report</a>
</li>
<!--Removal_Analysis_Exceptions end-->
</ul>
</li>
<!--Timing_Exceptions_Report end-->
<!--SDC_Report begin-->
<li><div class="triangle_fake"></div><a href="build_tr_content.html#SDC_Report" style=" font-size: 14px;" target="mainFrame">Timing Constraints Report</a></li>
<!--SDC_Report end-->
</ul>
</li>
<!-- details end-->
</ul>
</div><!-- catalog -->
</div><!-- catalog_wrapper -->
</body>
</html>
File diff suppressed because it is too large Load Diff
+21
View File
@@ -0,0 +1,21 @@
-d /work/impl/gwsynthesis/build.vg
-p GW5AST-138C-PBGA484A-1
-pn GW5AST-LV138PG484AC1/I0
-cst /work/pins.cst
-cfg /work/impl/pnr/device.cfg
-sdc /work/test.sdc
-bit
-tr
-ph
-timing
-ireg_not_in_iob
-oreg_not_in_iob
-ioreg_not_in_iob
-cst_error
-convert_sdp32_36_to_sdp16_18
-place_option 3
-route_option 2
-clock_route_order 0
-correct_hold 1
-route_maxfan 23
-global_freq 5.000
+23
View File
@@ -0,0 +1,23 @@
set JTAG regular_io = false
set SSPI regular_io = false
set MSPI regular_io = false
set READY regular_io = false
set DONE regular_io = false
set I2C regular_io = false
set CPU regular_io = false
set CRC_check = true
set compress = false
set encryption = false
set security_bit_enable = true
set bsram_init_fuse_print = true
set background_programming = off
set secure_mode = false
set program_done_bypass = false
set wake_up = 0
set format = binary
set power_on_reset_monitor = true
set seu_handler = false
set ext_cclk = false
set vccx = 1.8
set vcc = 0.9
set unused_pin = default