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This commit is contained in:
Albin Chaboissier
2026-06-18 23:10:59 +02:00
parent 0d4fd7957f
commit 50dbc682d9
29 changed files with 2007161 additions and 93 deletions
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impl/pnr/build.bin Executable file
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Reading netlist file: "/work/impl/gwsynthesis/build.vg"
Parsing netlist file "/work/impl/gwsynthesis/build.vg" completed
Processing netlist completed
Reading constraint file: "/work/pins.cst"
Physical Constraint parsed completed
Running placement......
[10%] Placement Phase 0 completed
[20%] Placement Phase 1 completed
[30%] Placement Phase 2 completed
WARN (TA1118) : the clock "clk"'s frequency does not match pll_0/u_pll/PLL_inst's param "FCLKIN = "50""
[50%] Placement Phase 3 completed
Running routing......
[60%] Routing Phase 0 completed
[70%] Routing Phase 1 completed
[80%] Routing Phase 2 completed
WARN (PR1014) : Generic routing resource will be used to clock signal 'clk_d' by the specified constraint. And then it may lead to the excessive delay or skew
[90%] Routing Phase 3 completed
Running timing analysis......
[95%] Timing analysis completed
Placement and routing completed
Bitstream generation in progress......
Bitstream generation completed
Running power analysis......
[100%] Power analysis completed
Generate file "/work/impl/pnr/build.power.html" completed
Generate file "/work/impl/pnr/build.pin.html" completed
Generate file "/work/impl/pnr/build.rpt.html" completed
Generate file "/work/impl/pnr/build.rpt.txt" completed
Generate file "/work/impl/pnr/build.tr.html" completed
Thu Jun 18 20:00:32 2026

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`pragma protect begin_protected
`pragma protect version="1.0"
`pragma protect author="default"
`pragma protect author_info="default"
`pragma protect encrypt_agent="GOWIN"
`pragma protect encrypt_agent_info="GOWIN Encrypt Version 1.0"
`pragma protect encoding=(enctype="base64", line_length=76, bytes=256)
`pragma protect key_keyowner="GOWIN",key_keyname="GWK2022-11",key_method="rsa"
`pragma protect key_block
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`pragma protect encoding=(enctype="base64", line_length=76, bytes=3760)
`pragma protect data_keyowner="default-ip-vendor"
`pragma protect data_keyname="default-ip-key"
`pragma protect data_method="aes128-cbc"
`pragma protect data_block
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BEIN
`pragma protect end_protected
`pragma protect begin_protected
`pragma protect version="1.0"
`pragma protect author="default"
`pragma protect author_info="default"
`pragma protect encrypt_agent="GOWIN"
`pragma protect encrypt_agent_info="GOWIN Encrypt Version 1.0"
`pragma protect encoding=(enctype="base64", line_length=76, bytes=256)
`pragma protect key_keyowner="GOWIN",key_keyname="GWK2022-11",key_method="rsa"
`pragma protect key_block
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`pragma protect encoding=(enctype="base64", line_length=76, bytes=32)
`pragma protect data_keyowner="default-ip-vendor"
`pragma protect data_keyname="default-ip-key"
`pragma protect data_method="aes128-cbc"
`pragma protect data_block
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`pragma protect end_protected
`pragma protect begin_protected
`pragma protect version="1.0"
`pragma protect author="default"
`pragma protect author_info="default"
`pragma protect encrypt_agent="GOWIN"
`pragma protect encrypt_agent_info="GOWIN Encrypt Version 1.0"
`pragma protect encoding=(enctype="base64", line_length=76, bytes=256)
`pragma protect key_keyowner="GOWIN",key_keyname="GWK2022-11",key_method="rsa"
`pragma protect key_block
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`pragma protect encoding=(enctype="base64", line_length=76, bytes=96)
`pragma protect data_keyowner="default-ip-vendor"
`pragma protect data_keyname="default-ip-key"
`pragma protect data_method="aes128-cbc"
`pragma protect data_block
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`pragma protect end_protected
`pragma protect begin_protected
`pragma protect version="1.0"
`pragma protect author="default"
`pragma protect author_info="default"
`pragma protect encrypt_agent="GOWIN"
`pragma protect encrypt_agent_info="GOWIN Encrypt Version 1.0"
`pragma protect encoding=(enctype="base64", line_length=76, bytes=256)
`pragma protect key_keyowner="GOWIN",key_keyname="GWK2022-11",key_method="rsa"
`pragma protect key_block
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`pragma protect encoding=(enctype="base64", line_length=76, bytes=5904)
`pragma protect data_keyowner="default-ip-vendor"
`pragma protect data_keyname="default-ip-key"
`pragma protect data_method="aes128-cbc"
`pragma protect data_block
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`pragma protect end_protected
`pragma protect begin_protected
`pragma protect version="1.0"
`pragma protect author="default"
`pragma protect author_info="default"
`pragma protect encrypt_agent="GOWIN"
`pragma protect encrypt_agent_info="GOWIN Encrypt Version 1.0"
`pragma protect encoding=(enctype="base64", line_length=76, bytes=256)
`pragma protect key_keyowner="GOWIN",key_keyname="GWK2022-11",key_method="rsa"
`pragma protect key_block
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`pragma protect encoding=(enctype="base64", line_length=76, bytes=1840)
`pragma protect data_keyowner="default-ip-vendor"
`pragma protect data_keyname="default-ip-key"
`pragma protect data_method="aes128-cbc"
`pragma protect data_block
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`pragma protect end_protected

6429
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<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//ENhttp://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
<html>
<head>
<title>Power Analysis Report</title>
<style type="text/css">
body { font-family: Verdana, Arial, sans-serif; font-size: 12px; }
div#main_wrapper { width: 100%; }
div#content { margin-left: 350px; margin-right: 30px; }
div#catalog_wrapper {position: fixed; top: 30px; width: 350px; float: left; }
div#catalog ul { list-style-type: none; }
div#catalog li { text-align: left; list-style-type:circle; color: #0084ff; margin-top: 3px; margin-bottom: 3px; }
div#catalog a { display:inline-block; text-decoration: none; color: #0084ff; font-weight: bold; padding: 3px; }
div#catalog a:visited { color: #0084ff; }
div#catalog a:hover { color: #fff; background: #0084ff; }
hr { margin-top: 30px; margin-bottom: 30px; }
h1, h3 { text-align: center; }
h1 {margin-top: 50px; }
table, th, td {white-space:pre; border: 1px solid #aaa; }
table { border-collapse:collapse; margin-top: 10px; margin-bottom: 20px; width: 100%; }
th, td { padding: 5px 5px 5px 5px; }
th { color: #fff; font-weight: bold; background-color: #0084ff; }
table.summary_table td.label { width: 24%; min-width: 200px; background-color: #dee8f4; }
table.thermal_table td.label { width: 24%; min-width: 200px; background-color: #dee8f4; }
table.Configure_table td.label { width: 24%; min-width: 200px; background-color: #dee8f4; }
table.detail_table th.label { min-width: 8%; width: 8%; }
</style>
</head>
<body>
<div id="main_wrapper">
<div id="catalog_wrapper">
<div id="catalog">
<ul>
<li><a href="#Message" style=" font-size: 16px;">Power Messages</a>
<ul>
<li><a href="#Configure_Info" style=" font-size: 14px;">Configure Information</a></li>
</ul>
</li>
<li><a href="#Summary" style=" font-size: 16px;">Power Summary</a>
<ul>
<li><a href="#Power_Info" style=" font-size: 14px;">Power Information</a></li>
<li><a href="#Thermal_Info" style=" font-size: 14px;">Thermal Information</a></li>
<li><a href="#Supply_Summary" style=" font-size: 14px;">Supply Information</a></li>
</ul>
</li>
<li><a href="#Detail" style=" font-size: 16px;">Power Details</a>
<ul>
<li><a href="#By_Block_Type" style=" font-size: 14px;">Power By Block Type</a></li>
<li><a href="#By_Hierarchy" style=" font-size: 14px;">Power By Hierarchy</a></li>
<li><a href="#By_Clock_Domain" style=" font-size: 14px;">Power By Clock Domain</a></li>
</ul>
</li>
</ul>
</div><!-- catalog -->
</div><!-- catalog_wrapper -->
<div id="content">
<h1><a name="Message">Power Messages</a></h1>
<table class="summary_table">
<tr>
<td class="label">Report Title</td>
<td>Power Analysis Report</td>
</tr>
<tr>
<td class="label">Design File</td>
<td>/work/impl/gwsynthesis/build.vg</td>
</tr>
<tr>
<td class="label">Physical Constraints File</td>
<td>/work/pins.cst</td>
</tr>
<tr>
<td class="label">Timing Constraints File</td>
<td>/work/test.sdc</td>
</tr>
<tr>
<td class="label">Tool Version</td>
<td>V1.9.11.03 Education</td>
</tr>
<tr>
<td class="label">Part Number</td>
<td>GW5AST-LV138PG484AC1/I0</td>
</tr>
<tr>
<td class="label">Device</td>
<td>GW5AST-138</td>
</tr>
<tr>
<td class="label">Device Version</td>
<td>C</td>
</tr>
<tr>
<td class="label">Created Time</td>
<td>Thu Jun 18 20:00:32 2026
</td>
</tr>
<tr>
<td class="label">Legal Announcement</td>
<td>Copyright (C)2014-2025 Gowin Semiconductor Corporation. All rights reserved.</td>
</tr>
</table>
<h2><a name="Configure_Info">Configure Information:</a></h2>
<table class="summary_table">
<tr>
<td class="label">Grade</td>
<td>Commercial</td>
</tr>
<tr>
<td class="label">Process</td>
<td>Typical</td>
</tr>
<tr>
<td class="label">Ambient Temperature</td>
<td>25.000
</tr>
<tr>
<td class="label">Use Custom Theta JA</td>
<td>false</td>
</tr>
<tr>
<td class="label">Heat Sink</td>
<td>None</td>
</tr>
<tr>
<td class="label">Air Flow</td>
<td>LFM_0</td>
</tr>
<tr>
<td class="label">Use Custom Theta SA</td>
<td>false</td>
</tr>
<tr>
<td class="label">Board Thermal Model</td>
<td>None</td>
</tr>
<tr>
<td class="label">Use Custom Theta JB</td>
<td>false</td>
</tr>
<tr>
<td class="label">Related Vcd File</td>
<td></td>
</tr>
<tr>
<td class="label">Related Saif File</td>
<td></td>
</tr>
<tr>
<td class="label">Filter Glitches</td>
<td>false</td>
</tr>
<tr>
<td class="label">Default IO Toggle Rate</td>
<td>0.125</td>
</tr>
<tr>
<td class="label">Default Remain Toggle Rate</td>
<td>0.125</td>
</tr>
</table>
<h1><a name="Summary">Power Summary</a></h1>
<h2><a name="Power_Info">Power Information:</a></h2>
<table class="summary_table">
<tr>
<td class="label">Total Power (mW)</td>
<td>104.823</td>
</tr>
<tr>
<td class="label">Quiescent Power (mW)</td>
<td>100.835</td>
</tr>
<tr>
<td class="label">Dynamic Power (mW)</td>
<td>3.988</td>
</tr>
</table>
<h2><a name="Thermal_Info">Thermal Information:</a></h2>
<table class="summary_table">
<tr>
<td class="label">Junction Temperature</td>
<td>26.798</td>
</tr>
<tr>
<td class="label">Theta JA</td>
<td>17.153</td>
</tr>
<tr>
<td class="label">Max Allowed Ambient Temperature</td>
<td>83.202</td>
</tr>
</table>
<h2><a name="Supply_Summary">Supply Information:</a></h2>
<table class="summary_table">
<tr>
<th class="label">Voltage Source</th>
<th class="label">Voltage</th>
<th class="label">Dynamic Current(mA)</th>
<th class="label">Quiescent Current(mA)</th>
<th class="label">Power(mW)</th>
</tr>
<tr>
<td>VCC</td>
<td>0.900</td>
<td>4.148</td>
<td>80.012</td>
<td>75.744</td>
</tr>
<tr>
<td>VCCX</td>
<td>1.800</td>
<td>0.049</td>
<td>7.200</td>
<td>13.049</td>
</tr>
<tr>
<td>VCCIO33</td>
<td>3.300</td>
<td>0.050</td>
<td>3.062</td>
<td>10.270</td>
</tr>
<tr>
<td>VCCLDO</td>
<td>1.200</td>
<td>0.000</td>
<td>4.800</td>
<td>5.760</td>
</tr>
</table>
<h1><a name="Detail">Power Details</a></h1>
<h2><a name="By_Block_Type">Power By Block Type:</a></h2>
<table class="detail_table">
<tr>
<th class="label">Block Type</th>
<th class="label">Total Power(mW)</th>
<th class="label">Static Power(mW)</th>
<th class="label">Average Toggle Rate(millions of transitions/sec)</th>
</tr>
<tr>
<td>Logic</td>
<td>0.024</td>
<td>NA</td>
<td>1.885</td>
</tr>
<tr>
<td>IO</td>
<td>11.490
<td>11.191
<td>3.038
</tr>
<tr>
<td>PLL</td>
<td>3.664
<td>NA</td>
<td>NA</td>
</tr>
</table>
<h2><a name="By_Hierarchy">Power By Hierarchy:</a></h2>
<table class="detail_table">
<tr>
<th class="label">Hierarchy Entity</th>
<th class="label">Total Power(mW)</th>
<th class="label">Block Dynamic Power(mW)</th>
</tr>
<tr>
<td>main</td>
<td>3.688</td>
<td>3.688(3.686)</td>
<tr>
<td>main/pll_0/</td>
<td>3.678</td>
<td>3.678(3.678)</td>
<tr>
<td>main/pll_0/u_pll/</td>
<td>3.664</td>
<td>3.664(0.000)</td>
<tr>
<td>main/pll_0/u_pll_init/</td>
<td>0.014</td>
<td>0.014(0.000)</td>
<tr>
<td>main/wrapping_add_0/</td>
<td>0.008</td>
<td>0.008(0.000)</td>
</table>
<h2><a name="By_Clock_Domain">Power By Clock Domain:</a></h2>
<table class="detail_table">
<tr>
<th class="label">Clock Domain</th>
<th class="label">Clock Frequency(Mhz)</th>
<th class="label">Total Dynamic Power(mW)</th>
</tr>
<tr>
<td>clk</td>
<td>20.000</td>
<td>3.679</td>
</tr>
<tr>
<td>pll_0/u_pll/PLL_inst/CLKOUT0.default_gen_clk</td>
<td>9.677</td>
<td>0.010</td>
</tr>
</table>
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//Copyright (C)2014-2025 Gowin Semiconductor Corporation.
//All rights reserved.
1. PnR Messages
<Report Title>: PnR Report
<Design File>: /work/impl/gwsynthesis/build.vg
<Physical Constraints File>: /work/pins.cst
<Timing Constraints File>: /work/test.sdc
<Tool Version>: V1.9.11.03 Education
<Part Number>: GW5AST-LV138PG484AC1/I0
<Device>: GW5AST-138
<Device Version>: C
<Created Time>:Thu Jun 18 20:00:32 2026
2. PnR Details
Running placement:
Placement Phase 0: CPU time = 0h 0m 0.007s, Elapsed time = 0h 0m 0.007s
Placement Phase 1: CPU time = 0h 0m 0.01s, Elapsed time = 0h 0m 0.014s
Placement Phase 2: CPU time = 0h 0m 0.003s, Elapsed time = 0h 0m 0.003s
Placement Phase 3: CPU time = 0h 0m 0.406s, Elapsed time = 0h 0m 0.407s
Total Placement: CPU time = 0h 0m 0.426s, Elapsed time = 0h 0m 0.431s
Running routing:
Routing Phase 0: CPU time = 0h 0m 0.655s, Elapsed time = 0h 0m 0.657s
Routing Phase 1: CPU time = 0h 0m 2s, Elapsed time = 0h 0m 2s
Routing Phase 2: CPU time = 0h 0m 0.095s, Elapsed time = 0h 0m 0.096s
Routing Phase 3: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0s
Total Routing: CPU time = 0h 0m 3s, Elapsed time = 0h 0m 3s
Generate output files:
CPU time = 0h 0m 6s, Elapsed time = 0h 0m 6s
Total Time and Memory Usage: CPU time = 0h 0m 9s, Elapsed time = 0h 0m 9s, Peak memory usage = 1228MB
3. Resource Usage Summary
--------------------------------------------------------------------------------
Resources | Usage | Utilization
--------------------------------------------------------------------------------
Logic | 120/138240 | <1%
--LUT,ALU,ROM16 | 120(73 LUT, 47 ALU, 0 ROM16) | -
--SSRAM(RAM16) | 0 | -
Register | 72/139095 | <1%
--Logic Register as Latch | 0/138240 | 0%
--Logic Register as FF | 72/138240 | <1%
--I/O Register as Latch | 0/855 | 0%
--I/O Register as FF | 0/855 | 0%
CLS | 71/69120 | <1%
I/O Port | 9/297 | 4%
I/O Buf | 9 | -
--Input Buf | 1 | -
--Output Buf | 8 | -
--Inout Buf | 0 | -
================================================================================
4. I/O Bank Usage Summary
--------------------------------------
I/O Bank | Usage | Utilization
--------------------------------------
bank 2 | 0/50 | 0%
bank 3 | 4/50 | 8%
bank 4 | 5/50 | 10%
bank 5 | 0/35 | 0%
bank 6 | 0/50 | 0%
bank 7 | 0/50 | 0%
bank 10 | 0/12 | 0%
======================================
5. Clock Resource Usage Summary
------------------------------------------
Clock Resource| Usage | Utilization
------------------------------------------
PRIMARY | 2/8 | 25%
LW | 0/8 | 0%
GCLK_PIN | 0/24 | 0%
PLL | 1/12 | 9%
==========================================
6. Global Clock Signals
-------------------------------------------
Signal | Global Clock | Location
-------------------------------------------
clk_d | PRIMARY | PBR2 PBR3
tmds_clk_d | PRIMARY | PBR2 PBR3
===========================================
7. Pinout by Port Name
------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
Port Name | Diff Pair | Loc./Bank | Constraint | Dir. | Site | CFG | IO Type | Drive | Pull Mode | PCI Clamp | Hysteresis | Open Drain | Vref | Single Resistor | Diff Resistor | BankVccio | Pull Strength | Ctle
------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
clk | - | V22/4 | Y | in | IOB104[B] | EMCCLK | LVCMOS33 | OFF | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
leds[0] | - | T18/4 | Y | out | IOB138[B] | D23 | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
leds[1] | - | R18/4 | Y | out | IOB138[A] | D24 | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
leds[2] | - | R17/4 | Y | out | IOB144[B] | D16 | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
leds[3] | - | P16/4 | Y | out | IOB144[A] | D17 | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
tmds_clk | - | G15/3 | Y | out | IOR105[A] | - | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
tmds[0] | - | J14/3 | Y | out | IOR103[A] | - | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
tmds[1] | - | J15/3 | Y | out | IOR101[A] | - | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
tmds[2] | - | K17/3 | Y | out | IOR58[A] | - | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
==================================================================================================================================================================================================================
8. All Package Pins
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
Loc./Bank| Signal | Dir. | Site | CFG | IO Type | Drive | Pull Mode | PCI Clamp | Hysteresis | Open Drain | Vref | Single Resistor | Diff Resistor | Bank Vccio | Pull Strength | Ctle
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
AB11/5 | - | in | IOB51[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB12/5 | - | in | IOB51[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA9/5 | - | in | IOB53[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB10/5 | - | in | IOB53[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA10/5 | - | in | IOB56[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA11/5 | - | in | IOB56[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V10/5 | - | in | IOB58[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W10/5 | - | in | IOB58[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y11/5 | - | in | IOB60[A] | SGCLKT_6/BPLL0_T_IN0/BPLL1_T_IN0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y12/5 | - | in | IOB60[B] | SGCLKC_6/BPLL0_C_IN0/BPLL1_C_IN0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W11/5 | - | in | IOB62[A] | MGCLKT_6/BPLL0_T_IN1/BPLL1_T_IN1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W12/5 | - | in | IOB62[B] | MGCLKC_6/BPLL0_C_IN1/BPLL1_C_IN1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V13/5 | - | in | IOB66[A] | MGCLKT_7/BPLL0_T_FB0/BPLL1_T_FB0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V14/5 | - | in | IOB66[B] | MGCLKC_7/BPLL0_C_FB0/BPLL1_C_FB0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U15/5 | - | in | IOB68[A] | SGCLKT_7/BPLL0_T_FB1/BPLL1_T_FB1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V15/5 | - | in | IOB68[B] | SGCLKC_7/BPLL0_C_FB1/BPLL1_C_FB1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
T14/5 | - | in | IOB70[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
T15/5 | - | in | IOB70[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W15/5 | - | in | IOB72[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W16/5 | - | in | IOB72[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
T16/5 | - | in | IOB76[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U16/5 | - | in | IOB76[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y16/5 | - | in | IOB78[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA16/5 | - | in | IOB78[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB16/5 | - | in | IOB80[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB17/5 | - | in | IOB80[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA15/5 | - | in | IOB83[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB15/5 | - | in | IOB83[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W14/5 | - | in | IOB85[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y14/5 | - | in | IOB85[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y13/5 | - | in | IOB87[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA14/5 | - | in | IOB87[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA13/5 | - | in | IOB89[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB13/5 | - | in | IOB89[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y17/5 | - | in | IOB91[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
P20/4 | - | in | IOB92[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
P22/4 | - | in | IOB93[A] | D00/MOSI | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
R22/4 | - | in | IOB93[B] | D01/DIN | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
P21/4 | - | in | IOB95[A] | D02 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
R21/4 | - | in | IOB95[B] | D03 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
T21/4 | - | in | IOB97[A] | D04 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U21/4 | - | in | IOB97[B] | D05/SI | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
P19/4 | - | in | IOB99[A] | D06/SSPI_CLK | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
R19/4 | - | in | IOB99[B] | D07/SSPI_WPN | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
T19/4 | - | in | IOB102[A] | MCS_N | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
T20/4 | - | in | IOB102[B] | D08/SO | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U22/4 | - | in | IOB104[A] | PUDC_B | LVCMOS33 | 8 | DOWN | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V22/4 | clk | in | IOB104[B] | EMCCLK | LVCMOS33 | OFF | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V17/4 | - | in | IOB106[A] | CSI_B | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W17/4 | - | in | IOB106[B] | D31 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA18/4 | - | in | IOB108[A] | D30 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB18/4 | - | in | IOB108[B] | D29 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA19/4 | - | in | IOB110[A] | RDWR | LVCMOS33 | 8 | DOWN | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB20/4 | - | out | IOB110[B] | DOUT_CSO_B | LVCMOS33 | 8 | UP | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U17/4 | - | in | IOB112[A] | D28 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U18/4 | - | in | IOB112[B] | D27 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V18/4 | - | in | IOB114[A] | SGCLKT_4/BPLL2_T_FB1/BPLL3_T_FB1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V19/4 | - | in | IOB114[B] | SGCLKC_4/BPLL2_C_FB1/BPLL3_C_FB1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y18/4 | - | in | IOB116[A] | MGCLKT_4/BPLL2_T_FB0/BPLL3_T_FB0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y19/4 | - | in | IOB116[B] | MGCLKC_4/BPLL2_C_FB0/BPLL3_C_FB0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U20/4 | - | in | IOB120[A] | SGCLKT_5/BPLL2_T_IN0/BPLL3_T_IN0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V20/4 | - | in | IOB120[B] | SGCLKC_5/BPLL2_C_IN0/BPLL3_C_IN0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W19/4 | - | in | IOB122[A] | MGCLKT_5/BPLL2_T_IN1/BPLL3_T_IN1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W20/4 | - | in | IOB122[B] | MGCLKC_5/BPLL2_C_IN1/BPLL3_C_IN1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W21/4 | - | in | IOB124[A] | D09 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W22/4 | - | in | IOB124[B] | D10 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA20/4 | - | in | IOB126[A] | D11 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA21/4 | - | in | IOB126[B] | D12 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB21/4 | - | in | IOB129[A] | D14 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB22/4 | - | in | IOB129[B] | D15 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y21/4 | - | in | IOB131[A] | SSPI_CS_N | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y22/4 | - | in | IOB131[B] | D13 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
P14/4 | - | in | IOB133[A] | D26 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
R14/4 | - | in | IOB133[B] | D25 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
N17/4 | - | in | IOB135[A] | CLKHOLD_N | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
P17/4 | - | in | IOB135[B] | D22 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
R18/4 | leds[1] | out | IOB138[A] | D24 | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
T18/4 | leds[0] | out | IOB138[B] | D23 | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
P15/4 | - | in | IOB140[A] | D21 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
R16/4 | - | in | IOB140[B] | D20 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
N13/4 | - | in | IOB142[A] | D19 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
N14/4 | - | in | IOB142[B] | D18 | LVCMOS33 | 8 | NONE | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
P16/4 | leds[3] | out | IOB144[A] | D17 | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
R17/4 | leds[2] | out | IOB144[B] | D16 | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
N15/4 | - | in | IOB146[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U13/10 | - | out | IOB169[A] | TDO | LVCMOS33 | 8 | UP | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
T13/10 | - | in | IOB169[B] | TMS | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U12/10 | - | in | IOB171[A] | READY | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
G11/10 | - | in | IOB171[B] | DONE | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V12/10 | - | in | IOB173[A] | TCK | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
R13/10 | - | in | IOB173[B] | TDI | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U11/10 | - | in | IOB175[A] | MODE0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
L12/10 | - | in | IOB175[B] | CCLK | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U10/10 | - | in | IOB177[A] | MODE1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U9/10 | - | in | IOB177[B] | MODE2 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U8/10 | - | in | IOB179[A] | CFGBVS | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
N12/10 | - | in | IOB179[B] | RECONFIG_N | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
F4/7 | - | in | IOL1[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
B1/7 | - | in | IOL2[A] | ADCINCK0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
A1/7 | - | in | IOL2[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
E1/7 | - | in | IOL4[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
D1/7 | - | in | IOL4[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
C2/7 | - | in | IOL6[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
B2/7 | - | in | IOL6[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
E2/7 | - | in | IOL8[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
D2/7 | - | in | IOL8[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
G1/7 | - | in | IOL11[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
F1/7 | - | in | IOL11[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
F3/7 | - | in | IOL13[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
E3/7 | - | in | IOL13[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
K1/7 | - | in | IOL15[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
J1/7 | - | in | IOL15[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
H2/7 | - | in | IOL17[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
G2/7 | - | in | IOL17[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
J5/7 | - | in | IOL20[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
H5/7 | - | in | IOL20[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
K2/7 | - | in | IOL22[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
J2/7 | - | in | IOL22[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
H4/7 | - | in | IOL24[A] | MGCLKT_11/LPLL0_T_IN1/LPLL1_T_IN1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
G4/7 | - | in | IOL24[B] | MGCLKC_11/LPLL0_C_IN1/LPLL1_C_IN1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
H3/7 | - | in | IOL26[A] | SGCLKT_11/LPLL0_T_IN0/LPLL1_T_IN0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
G3/7 | - | in | IOL26[B] | SGCLKC_11/LPLL0_C_IN0/LPLL1_C_IN0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
K4/7 | - | in | IOL29[A] | MGCLKT_10/LPLL0_T_FB1/LPLL1_T_FB1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
J4/7 | - | in | IOL29[B] | MGCLKC_10/LPLL0_C_FB1/LPLL1_C_FB1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
L3/7 | - | in | IOL31[A] | SGCLKT_10/LPLL0_T_FB0/LPLL1_T_FB0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
K3/7 | - | in | IOL31[B] | SGCLKC_10/LPLL0_C_FB0/LPLL1_C_FB0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
M3/7 | - | in | IOL33[A] | FBTEST_L0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
M2/7 | - | in | IOL33[B] | CLKTEST_L0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
M1/7 | - | in | IOL35[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
L1/7 | - | in | IOL35[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
K6/7 | - | in | IOL38[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
J6/7 | - | in | IOL38[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
L5/7 | - | in | IOL40[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
L4/7 | - | in | IOL40[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
N4/7 | - | in | IOL42[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
N3/7 | - | in | IOL42[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
R1/7 | - | in | IOL44[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
P1/7 | - | in | IOL44[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
P2/7 | - | in | IOL47[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
N2/7 | - | in | IOL47[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
P5/7 | - | in | IOL49[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
P4/7 | - | in | IOL49[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
M6/7 | - | in | IOL51[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
M5/7 | - | in | IOL51[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
P6/7 | - | in | IOL53[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
N5/7 | - | in | IOL53[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
L6/7 | - | in | IOL55[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
T1/6 | - | in | IOL56[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U1/6 | - | in | IOL56[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U2/6 | - | in | IOL58[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V2/6 | - | in | IOL58[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U3/6 | - | in | IOL60[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V3/6 | - | in | IOL60[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W2/6 | - | in | IOL62[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y2/6 | - | in | IOL62[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
R3/6 | - | in | IOL65[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
R2/6 | - | in | IOL65[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W1/6 | - | in | IOL67[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y1/6 | - | in | IOL67[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y3/6 | - | in | IOL69[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA3/6 | - | in | IOL69[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA1/6 | - | in | IOL71[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB1/6 | - | in | IOL71[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
T3/6 | - | in | IOL73[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB3/6 | - | in | IOL74[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB2/6 | - | in | IOL74[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA5/6 | - | in | IOL76[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB5/6 | - | in | IOL76[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y4/6 | - | in | IOL78[A] | SGCLKT_8/LPLL2_T_IN0/LPLL3_T_IN0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA4/6 | - | in | IOL78[B] | SGCLKC_8/LPLL2_C_IN0/LPLL3_C_IN0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V4/6 | - | in | IOL80[A] | MGCLKT_8/LPLL2_T_IN1/LPLL3_T_IN1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W4/6 | - | in | IOL80[B] | MGCLKC_8/LPLL2_C_IN1/LPLL3_C_IN1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
R4/6 | - | in | IOL83[A] | MGCLKT_9/LPLL2_T_FB1/LPLL3_T_FB1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
T4/6 | - | in | IOL83[B] | MGCLKC_9/LPLL2_C_FB1/LPLL3_C_FB1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
T5/6 | - | in | IOL85[A] | SGCLKT_9/LPLL2_T_FB0/LPLL3_T_FB0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U5/6 | - | in | IOL85[B] | SGCLKC_9/LPLL2_C_FB0/LPLL3_C_FB0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U6/6 | - | in | IOL87[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V5/6 | - | in | IOL87[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
R6/6 | - | in | IOL89[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
T6/6 | - | in | IOL89[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y6/6 | - | in | IOL92[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA6/6 | - | in | IOL92[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W6/6 | - | in | IOL94[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W5/6 | - | in | IOL94[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V9/6 | - | in | IOL96[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V8/6 | - | in | IOL96[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB7/6 | - | in | IOL98[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB6/6 | - | in | IOL98[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AA8/6 | - | in | IOL101[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
AB8/6 | - | in | IOL101[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y8/6 | - | in | IOL103[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y7/6 | - | in | IOL103[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W9/6 | - | in | IOL105[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
Y9/6 | - | in | IOL105[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
V7/6 | - | in | IOL107[A] | MCKTEST | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
W7/6 | - | in | IOL107[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
U7/6 | - | in | IOL109[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
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F15/2 | - | in | IOR1[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
E13/2 | - | in | IOR2[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
E14/2 | - | in | IOR2[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
D14/2 | - | in | IOR4[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
D15/2 | - | in | IOR4[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
E16/2 | - | in | IOR6[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
D16/2 | - | in | IOR6[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
C14/2 | - | in | IOR8[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
C15/2 | - | in | IOR8[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
F13/2 | - | in | IOR11[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
F14/2 | - | in | IOR11[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
F16/2 | - | in | IOR13[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
E17/2 | - | in | IOR13[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
A13/2 | - | in | IOR15[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
A14/2 | - | in | IOR15[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
C13/2 | - | in | IOR17[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
B13/2 | - | in | IOR17[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
A15/2 | - | in | IOR20[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
A16/2 | - | in | IOR20[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
B15/2 | - | in | IOR22[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
B16/2 | - | in | IOR22[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
B17/2 | - | in | IOR24[A] | SGCLKT_1/RPLL0_T_FB0/RPLL1_T_FB0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
B18/2 | - | in | IOR24[B] | SGCLKC_1/RPLL0_C_FB0/RPLL1_C_FB0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
D17/2 | - | in | IOR26[A] | MGCLKT_1/RPLL0_T_FB1/RPLL1_T_FB1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
C17/2 | - | in | IOR26[B] | MGCLKC_1/RPLL0_C_FB1/RPLL1_C_FB1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
E19/2 | - | in | IOR29[A] | SGCLKT_0/RPLL0_T_IN0/RPLL1_T_IN0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
D19/2 | - | in | IOR29[B] | SGCLKC_0/RPLL0_C_IN0/RPLL1_C_IN0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
C18/2 | - | in | IOR31[A] | MGCLKT_0/RPLL0_T_IN1/RPLL1_T_IN1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
C19/2 | - | in | IOR31[B] | MGCLKC_0/RPLL0_C_IN1/RPLL1_C_IN1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
F19/2 | - | in | IOR33[A] | FBTEST_R0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
F20/2 | - | in | IOR33[B] | CLKTEST_R0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
F18/2 | - | in | IOR35[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
E18/2 | - | in | IOR35[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
A18/2 | - | in | IOR38[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
A19/2 | - | in | IOR38[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
B20/2 | - | in | IOR40[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
A20/2 | - | in | IOR40[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
C22/2 | - | in | IOR42[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
B22/2 | - | in | IOR42[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
B21/2 | - | in | IOR44[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
A21/2 | - | in | IOR44[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
D20/2 | - | in | IOR47[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
C20/2 | - | in | IOR47[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
E22/2 | - | in | IOR49[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
D22/2 | - | in | IOR49[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
E21/2 | - | in | IOR51[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
D21/2 | - | in | IOR51[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
G21/2 | - | in | IOR53[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
G22/2 | - | in | IOR53[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
F21/2 | - | in | IOR55[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
M13/3 | - | in | IOR56[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
L13/3 | - | in | IOR56[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
K17/3 | tmds[2] | out | IOR58[A] | - | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
J17/3 | - | in | IOR58[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
K13/3 | - | in | IOR60[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
K14/3 | - | in | IOR60[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
L14/3 | - | in | IOR62[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
L15/3 | - | in | IOR62[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
L16/3 | - | in | IOR65[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
K16/3 | - | in | IOR65[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
M15/3 | - | in | IOR67[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
M16/3 | - | in | IOR67[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
H20/3 | - | in | IOR69[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
G20/3 | - | in | IOR69[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
M21/3 | - | in | IOR71[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
L21/3 | - | in | IOR71[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
M17/3 | - | in | IOR73[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
J22/3 | - | in | IOR74[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
H22/3 | - | in | IOR74[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
K21/3 | - | in | IOR76[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
K22/3 | - | in | IOR76[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
J20/3 | - | in | IOR78[A] | SGCLKT_3/RPLL2_T_FB0/RPLL3_T_FB0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
J21/3 | - | in | IOR78[B] | SGCLKC_3/RPLL2_C_FB0/RPLL3_C_FB0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
J19/3 | - | in | IOR80[A] | MGCLKT_3/RPLL2_T_FB1/RPLL3_T_FB1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
H19/3 | - | in | IOR80[B] | MGCLKC_3/RPLL2_C_FB1/RPLL3_C_FB1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
K18/3 | - | in | IOR83[A] | MGCLKT_2/RPLL2_T_IN1/RPLL3_T_IN1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
K19/3 | - | in | IOR83[B] | MGCLKC_2/RPLL2_C_IN1/RPLL3_C_IN1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
L19/3 | - | in | IOR85[A] | SGCLKT_2/RPLL2_T_IN0/RPLL3_T_IN0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
L20/3 | - | in | IOR85[B] | SGCLKC_2/RPLL2_C_IN0/RPLL3_C_IN0 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
M18/3 | - | in | IOR87[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
L18/3 | - | in | IOR87[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
N22/3 | - | in | IOR89[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
M22/3 | - | in | IOR89[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
N18/3 | - | in | IOR92[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
N19/3 | - | in | IOR92[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
N20/3 | - | in | IOR94[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
M20/3 | - | in | IOR94[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
H17/3 | - | in | IOR96[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
H18/3 | - | in | IOR96[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
H13/3 | - | in | IOR98[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
G13/3 | - | in | IOR98[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
J15/3 | tmds[1] | out | IOR101[A] | - | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
H15/3 | - | in | IOR101[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
J14/3 | tmds[0] | out | IOR103[A] | - | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
H14/3 | - | in | IOR103[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
G15/3 | tmds_clk | out | IOR105[A] | - | LVCMOS33 | 8 | NONE | OFF | OFF | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
G16/3 | - | in | IOR105[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
G17/3 | - | in | IOR107[A] | ADCINCK1 | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
G18/3 | - | in | IOR107[B] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
J16/3 | - | in | IOR109[A] | - | LVCMOS33 | 8 | UP | OFF | ON | OFF | OFF | OFF | OFF | 3.3 | MEDIUM | NONE
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
N9/ADC | - | in | ADCTN | - | - | - | - | - | - | - | - | - | - | - | - | -
N10/ADC | - | in | ADCTP | - | - | - | - | - | - | - | - | - | - | - | - | -
M9/ADC | - | in | ADCVN | - | - | - | - | - | - | - | - | - | - | - | - | -
L10/ADC | - | in | ADCVP | - | - | - | - | - | - | - | - | - | - | - | - | -
A8/Q0 | - | in | Q0_LN0_RXM_I | - | - | - | - | - | - | - | - | - | - | - | - | -
B8/Q0 | - | in | Q0_LN0_RXP_I | - | - | - | - | - | - | - | - | - | - | - | - | -
A4/Q0 | - | out | Q0_LN0_TXM_O | - | - | - | - | - | - | - | - | - | - | - | - | -
B4/Q0 | - | out | Q0_LN0_TXP_O | - | - | - | - | - | - | - | - | - | - | - | - | -
C9/Q0 | - | in | Q0_LN1_RXM_I | - | - | - | - | - | - | - | - | - | - | - | - | -
D9/Q0 | - | in | Q0_LN1_RXP_I | - | - | - | - | - | - | - | - | - | - | - | - | -
C7/Q0 | - | out | Q0_LN1_TXM_O | - | - | - | - | - | - | - | - | - | - | - | - | -
D7/Q0 | - | out | Q0_LN1_TXP_O | - | - | - | - | - | - | - | - | - | - | - | - | -
A10/Q0 | - | in | Q0_LN2_RXM_I | - | - | - | - | - | - | - | - | - | - | - | - | -
B10/Q0 | - | in | Q0_LN2_RXP_I | - | - | - | - | - | - | - | - | - | - | - | - | -
A6/Q0 | - | out | Q0_LN2_TXM_O | - | - | - | - | - | - | - | - | - | - | - | - | -
B6/Q0 | - | out | Q0_LN2_TXP_O | - | - | - | - | - | - | - | - | - | - | - | - | -
C11/Q0 | - | in | Q0_LN3_RXM_I | - | - | - | - | - | - | - | - | - | - | - | - | -
D11/Q0 | - | in | Q0_LN3_RXP_I | - | - | - | - | - | - | - | - | - | - | - | - | -
C5/Q0 | - | out | Q0_LN3_TXM_O | - | - | - | - | - | - | - | - | - | - | - | - | -
D5/Q0 | - | out | Q0_LN3_TXP_O | - | - | - | - | - | - | - | - | - | - | - | - | -
E6/Q0 | - | in | Q0_REFCLKM_0 | - | - | - | - | - | - | - | - | - | - | - | - | -
E10/Q0 | - | in | Q0_REFCLKM_1 | - | - | - | - | - | - | - | - | - | - | - | - | -
F6/Q0 | - | in | Q0_REFCLKP_0 | - | - | - | - | - | - | - | - | - | - | - | - | -
F10/Q0 | - | in | Q0_REFCLKP_1 | - | - | - | - | - | - | - | - | - | - | - | - | -
======================================================================================================================================================================================

824
impl/pnr/build.timing_paths Normal file
View File

@ -0,0 +1,824 @@
=====
SETUP
46.472
9.450
55.922
clk_ibuf
0.000
0.683
pll_0/u_pll_init/locksig_4_s0
5.979
6.361
pll_0/u_pll_init/n525_s16
7.523
8.090
pll_0/u_pll_init/n525_s14
8.301
8.869
pll_0/u_pll_init/n525_s12
8.871
9.450
pll_0/u_pll_init/RomAddr_1_s1
9.450
=====
SETUP
46.625
9.297
55.922
clk_ibuf
0.000
0.683
pll_0/u_pll_init/locksig_4_s0
5.979
6.361
pll_0/u_pll_init/n521_s17
7.371
7.939
pll_0/u_pll_init/n521_s15
8.111
8.568
pll_0/u_pll_init/n521_s12
8.719
9.297
pll_0/u_pll_init/RomAddr_3_s1
9.297
=====
SETUP
46.730
9.194
55.924
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_2_s0
5.988
6.356
pll_0/u_pll_init/RomAddr_3_s4
7.041
7.497
pll_0/u_pll_init/n523_s16
7.886
8.464
pll_0/u_pll_init/n523_s12
8.616
9.194
pll_0/u_pll_init/RomAddr_2_s1
9.194
=====
SETUP
46.770
9.161
55.932
clk_ibuf
0.000
0.683
pll_0/u_pll_init/locksig_4_s0
5.979
6.361
pll_0/u_pll_init/n527_s16
7.523
8.101
pll_0/u_pll_init/n527_s13
8.104
8.651
pll_0/u_pll_init/n527_s12
8.654
9.161
pll_0/u_pll_init/RomAddr_0_s1
9.161
=====
SETUP
46.969
8.708
55.677
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n504_s2
6.971
7.538
pll_0/u_pll_init/RomAddr_3_s3
7.716
8.283
pll_0/u_pll_init/RomAddr_2_s1
8.708
=====
SETUP
47.056
8.641
55.697
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_2_s0
5.988
6.356
pll_0/u_pll_init/n513_s9
7.443
8.022
pll_0/u_pll_init/n513_s8
8.024
8.283
pll_0/u_pll_init/state_2_s0
8.641
=====
SETUP
47.175
8.499
55.675
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n504_s2
6.971
7.538
pll_0/u_pll_init/RomAddr_3_s3
7.716
8.283
pll_0/u_pll_init/RomAddr_1_s1
8.499
=====
SETUP
47.175
8.499
55.675
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n504_s2
6.971
7.538
pll_0/u_pll_init/RomAddr_3_s3
7.716
8.283
pll_0/u_pll_init/RomAddr_3_s1
8.499
=====
SETUP
47.185
8.499
55.684
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n504_s2
6.971
7.538
pll_0/u_pll_init/RomAddr_3_s3
7.716
8.283
pll_0/u_pll_init/RomAddr_0_s1
8.499
=====
SETUP
47.298
8.377
55.675
clk_ibuf
0.000
0.683
pll_0/u_pll_init/RomAddr_3_s1
5.986
6.368
pll_0/u_pll_init/n987_s1
6.757
7.325
pll_0/u_pll_init/n992_s0
7.718
8.226
pll_0/u_pll_init/locksig_0_s0
8.377
=====
SETUP
47.324
8.649
55.973
clk_ibuf
0.000
0.683
pll_0/u_pll_init/waitcnt_5_s0
6.056
6.438
pll_0/u_pll_init/n541_s5
6.592
7.166
pll_0/u_pll_init/n541_s2
7.168
7.716
pll_0/u_pll_init/n541_s0
8.076
8.649
pll_0/u_pll_init/Waitlock_s0
8.649
=====
SETUP
47.385
8.279
55.664
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n564_s1
6.764
7.332
pll_0/u_pll_init/waitcnt_13_s0
8.279
=====
SETUP
47.385
8.279
55.664
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n564_s1
6.764
7.332
pll_0/u_pll_init/waitcnt_14_s0
8.279
=====
SETUP
47.385
8.279
55.664
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n564_s1
6.764
7.332
pll_0/u_pll_init/waitcnt_15_s0
8.279
=====
SETUP
47.385
8.279
55.664
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n564_s1
6.764
7.332
pll_0/u_pll_init/waitcnt_16_s0
8.279
=====
SETUP
47.394
8.279
55.674
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n564_s1
6.764
7.332
pll_0/u_pll_init/waitcnt_7_s0
8.279
=====
SETUP
47.394
8.279
55.674
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n564_s1
6.764
7.332
pll_0/u_pll_init/waitcnt_8_s0
8.279
=====
SETUP
47.394
8.279
55.674
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n564_s1
6.764
7.332
pll_0/u_pll_init/waitcnt_9_s0
8.279
=====
SETUP
47.394
8.279
55.674
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n564_s1
6.764
7.332
pll_0/u_pll_init/waitcnt_10_s0
8.279
=====
SETUP
47.394
8.279
55.674
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n564_s1
6.764
7.332
pll_0/u_pll_init/waitcnt_11_s0
8.279
=====
SETUP
47.394
8.279
55.674
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n564_s1
6.764
7.332
pll_0/u_pll_init/waitcnt_12_s0
8.279
=====
SETUP
47.452
8.308
55.761
clk_ibuf
0.000
0.683
pll_0/u_pll_init/Waitlock_s0
6.037
6.419
pll_0/u_pll_init/n516_s8
6.857
7.146
pll_0/u_pll_init/n516_s7
7.151
7.718
pll_0/u_pll_init/state_1_s0
8.308
=====
SETUP
47.512
8.248
55.761
clk_ibuf
0.000
0.683
pll_0/u_pll_init/Waitlock_s0
6.037
6.419
pll_0/u_pll_init/n516_s8
6.857
7.146
pll_0/u_pll_init/n519_s7
7.151
7.718
pll_0/u_pll_init/state_0_s0
8.248
=====
SETUP
47.516
8.158
55.675
clk_ibuf
0.000
0.683
pll_0/u_pll_init/RomAddr_3_s1
5.986
6.368
pll_0/u_pll_init/n987_s1
6.757
7.325
pll_0/u_pll_init/n989_s0
7.718
8.007
pll_0/u_pll_init/locksig_3_s0
8.158
=====
SETUP
47.622
8.061
55.683
clk_ibuf
0.000
0.683
pll_0/u_pll_init/state_1_s0
5.988
6.371
pll_0/u_pll_init/n564_s1
6.764
7.332
pll_0/u_pll_init/waitcnt_1_s0
8.061
=====
HOLD
0.275
6.149
5.874
counter_0_s0
5.849
5.990
wrapping_add_0/_e_1752_0_s2
5.996
6.149
counter_0_s0
6.149
=====
HOLD
0.278
3.210
2.932
clk_ibuf
0.000
0.675
pll_0/u_pll_init/waitcnt_0_s0
2.907
3.048
pll_0/u_pll_init/n562_s2
3.057
3.210
pll_0/u_pll_init/waitcnt_0_s0
3.210
=====
HOLD
0.378
3.222
2.844
clk_ibuf
0.000
0.675
pll_0/u_pll_init/enable_r_0_s0
2.889
3.033
pll_0/u_pll_init/enable_r_1_s0
3.222
=====
HOLD
0.380
3.293
2.914
clk_ibuf
0.000
0.675
pll_0/u_pll_init/RomAddr_3_s1
2.893
3.037
pll_0/u_pll_init/n28_s22
3.140
3.293
pll_0/u_pll_init/RomDreg_8_s0
3.293
=====
HOLD
0.380
3.293
2.914
clk_ibuf
0.000
0.675
pll_0/u_pll_init/RomAddr_3_s1
2.893
3.037
pll_0/u_pll_init/n27_s21
3.140
3.293
pll_0/u_pll_init/RomDreg_9_s0
3.293
=====
HOLD
0.389
3.290
2.901
clk_ibuf
0.000
0.675
pll_0/u_pll_init/RomAddr_1_s1
2.893
3.037
pll_0/u_pll_init/n26_s22
3.142
3.290
pll_0/u_pll_init/RomDreg_10_s0
3.290
=====
HOLD
0.394
6.265
5.871
counter_3_s0
5.858
5.999
wrapping_add_0/_e_1752_3_s
6.005
6.265
counter_3_s0
6.265
=====
HOLD
0.394
6.273
5.879
counter_13_s0
5.866
6.007
wrapping_add_0/_e_1752_13_s
6.013
6.273
counter_13_s0
6.273
=====
HOLD
0.394
6.273
5.879
counter_15_s0
5.866
6.007
wrapping_add_0/_e_1752_15_s
6.013
6.273
counter_15_s0
6.273
=====
HOLD
0.394
6.265
5.871
counter_25_s0
5.858
5.999
wrapping_add_0/_e_1752_25_s
6.005
6.265
counter_25_s0
6.265
=====
HOLD
0.394
6.265
5.871
counter_27_s0
5.858
5.999
wrapping_add_0/_e_1752_27_s
6.005
6.265
counter_27_s0
6.265
=====
HOLD
0.394
3.309
2.915
clk_ibuf
0.000
0.675
pll_0/u_pll_init/waitcnt_3_s0
2.902
3.043
pll_0/u_pll_init/n559_s
3.049
3.309
pll_0/u_pll_init/waitcnt_3_s0
3.309
=====
HOLD
0.394
3.306
2.911
clk_ibuf
0.000
0.675
pll_0/u_pll_init/waitcnt_7_s0
2.898
3.039
pll_0/u_pll_init/n555_s
3.046
3.306
pll_0/u_pll_init/waitcnt_7_s0
3.306
=====
HOLD
0.394
3.306
2.911
clk_ibuf
0.000
0.675
pll_0/u_pll_init/waitcnt_9_s0
2.898
3.039
pll_0/u_pll_init/n553_s
3.046
3.306
pll_0/u_pll_init/waitcnt_9_s0
3.306
=====
HOLD
0.394
3.302
2.908
clk_ibuf
0.000
0.675
pll_0/u_pll_init/waitcnt_13_s0
2.895
3.036
pll_0/u_pll_init/n549_s
3.042
3.302
pll_0/u_pll_init/waitcnt_13_s0
3.302
=====
HOLD
0.394
3.302
2.908
clk_ibuf
0.000
0.675
pll_0/u_pll_init/waitcnt_15_s0
2.895
3.036
pll_0/u_pll_init/n547_s
3.042
3.302
pll_0/u_pll_init/waitcnt_15_s0
3.302
=====
HOLD
0.394
6.269
5.875
counter_31_s0
5.862
6.003
wrapping_add_0/_e_1752_31_s
6.009
6.269
counter_31_s0
6.269
=====
HOLD
0.394
6.269
5.875
counter_9_s0
5.862
6.003
wrapping_add_0/_e_1752_9_s
6.009
6.269
counter_9_s0
6.269
=====
HOLD
0.394
6.269
5.875
counter_19_s0
5.862
6.003
wrapping_add_0/_e_1752_19_s
6.009
6.269
counter_19_s0
6.269
=====
HOLD
0.394
6.269
5.875
counter_21_s0
5.862
6.003
wrapping_add_0/_e_1752_21_s
6.009
6.269
counter_21_s0
6.269
=====
HOLD
0.397
6.272
5.875
counter_7_s0
5.862
6.003
wrapping_add_0/_e_1752_7_s
6.012
6.272
counter_7_s0
6.272
=====
HOLD
0.429
3.336
2.908
clk_ibuf
0.000
0.675
pll_0/u_pll_init/waitcnt_11_s0
2.898
3.043
pll_0/u_pll_init/n541_s0
3.138
3.336
pll_0/u_pll_init/Waitlock_s0
3.336
=====
HOLD
0.433
6.316
5.883
counter_1_s0
5.858
5.999
wrapping_add_0/_e_1752_1_s
6.068
6.316
counter_1_s0
6.316
=====
HOLD
0.433
3.360
2.928
clk_ibuf
0.000
0.675
pll_0/u_pll_init/waitcnt_1_s0
2.902
3.043
pll_0/u_pll_init/n561_s
3.112
3.360
pll_0/u_pll_init/waitcnt_1_s0
3.360
=====
HOLD
0.442
3.369
2.928
clk_ibuf
0.000
0.675
pll_0/u_pll_init/waitcnt_3_s0
2.902
3.043
pll_0/u_pll_init/n559_s
3.049
3.244
pll_0/u_pll_init/n558_s
3.244
3.264
pll_0/u_pll_init/n557_s
3.264
3.369
pll_0/u_pll_init/waitcnt_5_s0
3.369

10
impl/pnr/build.tr.html Normal file
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<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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18779
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21
impl/pnr/cmd.do Normal file
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-d /work/impl/gwsynthesis/build.vg
-p GW5AST-138C-PBGA484A-1
-pn GW5AST-LV138PG484AC1/I0
-cst /work/pins.cst
-cfg /work/impl/pnr/device.cfg
-sdc /work/test.sdc
-bit
-tr
-ph
-timing
-ireg_not_in_iob
-oreg_not_in_iob
-ioreg_not_in_iob
-cst_error
-convert_sdp32_36_to_sdp16_18
-place_option 3
-route_option 2
-clock_route_order 0
-correct_hold 1
-route_maxfan 23
-global_freq 5.000

23
impl/pnr/device.cfg Normal file
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set JTAG regular_io = false
set SSPI regular_io = false
set MSPI regular_io = false
set READY regular_io = false
set DONE regular_io = false
set I2C regular_io = false
set CPU regular_io = false
set CRC_check = true
set compress = false
set encryption = false
set security_bit_enable = true
set bsram_init_fuse_print = true
set background_programming = off
set secure_mode = false
set program_done_bypass = false
set wake_up = 0
set format = binary
set power_on_reset_monitor = true
set seu_handler = false
set ext_cclk = false
set vccx = 1.8
set vcc = 0.9
set unused_pin = default